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參數(shù)資料
| 型號： | MK2049-02 |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 51.84 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 87K |
| 代理商： | MK2049-02 |
MK2049-02
Communications Clock PLL
MDS2049-02
1
Revision 7309
Printed 7/30/99
MicroClock Division of ICS 525 Race Street San Jose CA 95126 (408)295-9800tel(408)295-9818fax
ICRO
CLOCK
ADVANCE
ADVANCE INFORMATION
INFORMATION
Packaged in 20 pin SOIC
Fixed input-output phase relationship
Accepts multiple inputs: 8 kHz backplane clock,
Loop Timing frequencies, or 10-28 MHz
Locks to 8 kHz ±100 ppm (External mode)
Buffer Mode allows jitter attenuation of
10–28 MHz input and x1/x0.5 or x2/x4 outputs
Exact ratios stored in the device eliminate the need
for external dividers
Patented design gives zero ppm synthesis error in
all output clocks
Output clock rates include T1, E1, T3, E3, and
OC3 submultiples
Low jitter designed to meet ANSI specifications
5V ±10% operation
The MK2049-02 is a Phase-Locked Loop (PLL)
based clock synthesizer that accepts multiple input
frequencies. With an 8 kHz clock input as a
reference, the MK2049-02 generates T1, E1, T3,
E3, and other communications frequencies. This
allows for the generation of clocks frequency-
locked to an 8 kHz backplane clock, simplifying
clock synchronization in communications systems.
The MK2049-02 can also accept a T1, E1, T3, or
E3 input clock and provide the same output for
loop timing, and has a “jitter-attenuated” buffer
capability. All outputs are frequency locked
together and to the input.
In the Buffer Mode, the MK2049-02 is ideal for
filtering jitter from 27 MHz video clocks or other
clocks with high jitter.
ICS/MicroClock can customize this device for
many other different frequencies. Contact your
ICS/MicroClock representative for more details.
Block Diagram
Description
Features
VDD GND
PLL
Clock
Synthesis,
Control, and
De-jitter
Circuitry
Output
Buffer
Output
Buffer
External/
Loop Timing
Mux
FS3:0
Clock
Input
CAP2
CAP1
CLK1
CLK2
Output
Buffer
8 kHz
(External
Mode only)
Crystal
Oscillator
Reference
Crystal
X1
X2
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MK2049-35SI | 49.152 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-44SI | 51.84 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-45ASITR | 125 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-45SITR | 125 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2049-45SILFTR | 125 MHz, OTHER CLOCK GENERATOR, PDSO20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MK2049-02S | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLLs |
| MK2049-02SI | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLLs |
| MK2049-02SITR | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLLs |
| MK2049-02STR | 制造商:ICS 制造商全稱:ICS 功能描述:Communications Clock PLLs |
| MK2049-03S | 制造商:MICROCLOCK 功能描述: |
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