參數(shù)資料
型號: MD8412B
廠商: Electronic Theatre Controls, Inc.
英文描述: LINK(IEEE 1394)
中文描述: 鏈接(1394)
文件頁數(shù): 82/114頁
文件大小: 577K
代理商: MD8412B
MD8412B
70
FUJIFUILM MICRODEVICES CO., LTD.
Ver 1.10
Figure 5-3-3 Sub-Buffer Size Assignment
5-3-3
Buffer access by bus width
As a method of access to a buffer, the MD8412B is provided with means of soft access and DMA access. Each method is
described below.
5-3-3-1
Soft access
Since IEEE P1394 offers packet configuration of the Quadlet unit, method can differ according to the width of bus to be
accessed. For a 32-bit width, data of one Quadlet can be written/read with a register corresponding to the directly control-
ling buffer. For an 8/16-bit width, however, data of one Quadlet must be divided and written/read 4 times for 8 bits, or
twice for 16 bits.
At first, procedures of writing in the ATF buffer in 8-bit width are described below.
Data for 1 Byte are written in a 40h register. Writing is then forwarded in the order of 41h, 42h, and 43h. When writing
for 43h is finished, data for one Quadlet become valid. Therefore, writing must be forwarded always in the order of 40h,
41h, 42h, and 43h.
31
ATF Register
0
7 - - - - - - - - - - 0 7 - - - - - - - - - - 0 7 - - - - - - - - - - 0 7 - - - - - - - - - - 0
40h
41h
42h
43h
Figure 5-3-4 Register Operation (ATF) for 8-Bit Width Soft Access
ARF
ATF
ARecBufferSize
ATotalSize - ARecBufferSize
ATotalSize
Asynchronous Buffer Size Set Register
IRF
ITF/IRF
IRecBufferSize
ITotalSize - IRecBufferSize
ITotalSize
Isochronous Buffer Size Set Register
ATotalSize + ITotalSize < 2Kbyte
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