LP MODES Debug can be left by removing " />
參數(shù)資料
型號(hào)： MCZ33905BD5EK
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 42/106頁(yè)
文件大小： 0K
描述： IC SBC CAN HS 5.0V 54SOIC
標(biāo)準(zhǔn)包裝： 26
應(yīng)用： 系統(tǒng)基礎(chǔ)芯片
接口： CAN，LIN
電源電壓： 5.5 V ~ 28 V
封裝/外殼： 54-SSOP（0.295"，7.50mm 寬）裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 54-SOICW-EP
包裝： 管件
安裝類型： 表面貼裝
Analog Integrated Circuit Device Data
40
Freescale Semiconductor
33903/4/5
FUNCTIONAL DEVICE OPERATION
LP MODES
Debug can be left by removing 8 to 10 V from the DEBUG
pin, or by the SPI command (Ref. to MODE register).
The 5 V-CAN regulator is ON by default in Debug mode.
LP MODES
The device has two main LP modes: LP mode with VDD
OFF, and LP mode with VDD ON.
Prior to entering into LP mode, I/O and CAN Wake-up
flags must be cleared (Ref. to mode register). If the Wake-up
flags are not cleared, the device will not enter into LP mode.
In addition, the CAN failure flags (i.e. CAN_F and CAN_UF)
must be cleared, in order to meet the LP current consumption
specification.
LP - VDD OFF
In this mode, VDD is turned OFF and the MCU connected
to VDD is unsupplied. This mode is entered using SPI. It can
also be entered by an automatic transition due to fail-safe
management. 5 V-CAN and VAUX regulators are also turned
OFF.
When the device is in LP VDD OFF mode, it monitors
external events to Wake-up and leave the LP mode. The
Wake-up events can occur from:
CAN
LIN interface, depending upon device part number
Expiration of an internal timer
I/O-0, and I/O-1 inputs, and depending upon device part
number and configuration, I/O-2 and/or -3 input
Cyclic sense of I/O-1 input, associated by I/O-0
activation, and depending upon device part number and
configuration, cyclic sense of I/O-2 and -3 input,
associated by I/O-0 activation
When a Wake-up event is detected, the device enters into
Reset mode and then into Normal Request mode. The Wake-
up sources are reported to the device SPI registers. In
summary, a Wake-up event from LP VDD OFF leads to the
VDD regulator turned ON, and the MCU operation restart.
LP - VDD ON
In this mode, the voltage at the VDD pin remains at 5.0 V
(or 3.3 V, depending upon device part number). The
objective is to maintain the MCU powered, with reduced
consumption. In such mode, the DC output current is
expected to be limited to 100
A or a few mA, as the ECU is
in reduced power operation mode.
During this mode, the 5 V-CAN and VAUX regulators are
OFF. The optional external PNP at VDD will also be
automatically disabled when entering this mode.
The same Wake-up events as in LP VDD OFF mode (CAN,
LIN, I/O, timer, cyclic sense) are available in LP VDD on
mode.
In addition, two additional Wake-up conditions are
available.
Dedicated SPI command. When device is in LP VDD ON
mode, the Wake-up by SPI command uses a write to
“Normal Request mode”, 0x5C10.
Output current from VDD exceeding LP-ITH threshold.
In LP VDD ON mode, the device is able to source several
tenths of mA DC. The current source capability can be time
limited, by a selectable internal timer. Timer duration is up to
32 ms, and is triggered when the output current exceed the
output current threshold typically 1.5 mA.
This allows for instance, a periodic activation of the MCU,
while the device remains in LP VDD on mode. If the duration
exceed the selected time (ex 32 ms), the device will detect a
Wake-up.
Wake-up events are reported to the MCU via a low level
pulse at INT pulse. The MCU will detect the INT pulse and
resume operation.
Watchdog Function in LP VDD ON Mode
It is possible to enable the watchdog function in LP VDD
ON mode. In this case, the principle is timeout.
Refresh of the watchdog is done either by:
a dedicated SPI command (different from any other SPI
command or simple CS activation which would Wake-
up - Ref. to the previous paragraph)
or by a temporary (less than 32 ms max) VDD over
current Wake-up (IDD > 1.5 mA typically).
As long as the watchdog refresh occurs, the device
remains in LP VDD on mode.
Mode Transitions
Mode transitions are either done automatically (i.e. after a
timeout expired or voltage conditions), or via a SPI command,
or by an external event such as a Wake-up. Some mode
changes are performed using the Secured SPI commands.
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