2011-2012 Microchip Technology Inc.
DS22272C-page 49
MCP4706/4716/4726
6.0
MCP47X6 I2C COMMANDS
The I2C protocol does not specify how commands are
formatted, so this section specifies the MCP47X6’s I2C
command formats and operation.
The commands can be grouped into the following
categories:
Write memory
Read memory
General Call commands
Many of these commands allow for continuous
operation. This means that the I2C master does not
generate
a
Stop
bit
but
repeats
the
required
data/clocks. This allows faster updates since the
overhead of the I2C control byte is removed. Table 6-1 shows the supported commands and the required
number of bit clocks for both single and continuous
commands.
Write commands, determined by the R/W bit = 0, use
up to three command codes bits (C2:C0) to determine
the write’s operation.
The Read command is strictly determined by the R/W
bit = 1. There are two formats of the command, one for
12-bit and 10-bit devices and a second for 8-bit
devices.
The
General
Call
commands
utilize
the
I2C
specification reserved General Call command address
and command codes.
6.0.1
ABORTING A TRANSMISSION
A Restart or Stop condition in an expected data bit
position will abort the current command sequence and
data will not be written to the MCP47X6.
TABLE 6-1:
I2C COMMANDS - NUMBER
OF CLOCKS
Command
# of Bit
Operation
Mode
Single
29
Continuous
18n + 11
Command
Single
38
Continuous
27n + 11
38
Continuous
27n + 11
Single
20
Continuous
9n + 11
Single
65
Continuous
54n + 11
Single
47
Continuous
36n + 11
Note 1:
“n” indicates the number of times the command
operation is to be repeated.
2:
This command is useful to determine when an
EEPROM programming cycle has completed
(RDY/BSY Status bit)
TABLE 6-2:
MCP47X6 SUPPORTED COMMANDS
Command
Code
Command Name
Writes Volatile
Memory?
Writes
EEPROM
Memory?
Command
during
EEPROM
Write
Cycle?
Comment
C2
C1
C0
Config.
DAC
Config. DAC
00
X
PD1:PD0
only
Yes
No
Writes volatile power-down bits
so can also be used to exit a
power-down state.
01
0
Command
Yes
No
01
1
Yes
No
0
Yes
No
10
1
Reserved
N/A
11
0
11
1
N/A
N/A
N/A
Yes
Determined by R/W bit in I2C
Control byte
N/A
No
Determined
by
General
Call
command byte after the I2C
General Call address.
N/A
No
Note
1:
2:
X = Don’t Care bit. This command format does not use C0 bit.
3:
Device operation is not specified.