- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383589 > MCP3551E (Microchip Technology Inc.) SENSOR COMP LOAD CELL 2LBF PDF資料下載
參數(shù)資料
| 型號： | MCP3551E |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | SENSOR COMP LOAD CELL 2LBF |
| 中文描述： | 低功耗，單通道22位Δ-Σ模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 13/30頁 |
| 文件大小： | 616K |
| 代理商： | MCP3551E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
2005 Microchip Technology Inc.
DS21950B-page 13
MCP3551/3
4.1
MCP3551/3 Delta-Sigma
Modulator
with Internal Offset and Gain
Calibration
The converter core of the MCP3551/3 devices is a
third-order delta-sigma modulator with automatic gain
and offset error calibrations. The modulator uses a 1-bit
DAC structure. The delta-sigma modulator processes
the sampled charges through switched capacitor
structures controlled by a very low drift oscillator for
reduced clock jitter.
During the conversion process, the modulator outputs
a bit stream with the bit frequency equivalent to the
f
OSC
/4 (see Table 4-1). The high oversampling
implemented in the modulator ensures very high
resolution and high averaging factor to achieve
low-noise specifications. The bit stream output of the
modulator is then processed by the digital decimation
filter in order to provide a 22-bit output code at a data
rate of 13.75 Hz for the MCP3551 and 60 Hz for the
MCP3553. Since the oversampling ratio is lower with
the MCP3553 device, a much higher output data rate is
achieved while still achieving 20 bits No Missing Codes
(NMC) and 20.6 ENOB.
A self-calibration of offset and gain occurs at the onset
of every conversion. The conversion data available at
the output of the device is always calibrated for offset
and gain through this process. This offset and gain
auto-calibration is performed internally and has no
impact on the speed of the converter since the offset
and gain errors are calibrated in real-time during the
conversion. The real-time offset and gain calibration
schemes do not affect the conversion process.
4.2
Digital Filter
The MCP3551/3 devices include a digital decimation
filter, which is a fourth-order modified SINC filter. This
filter averages the incoming bitstream from the modu-
lator and outputs a 22-bit conversion word in binary
two's complement. When all bits have been processed
by the filter, the output code is ready for SPI communi-
cation, the RDY flag is set on the SDO/RDY pin and all
the internal registers are reset in order to process the
next conversion.
Like the commonly used SINC filter, the modified SINC
filter in the MCP3551/3 family has the main notch
frequency located at f
S
/(OSR*L), where f
S
is the bit-
stream sample frequency. OSR is the Oversampling
Ratio and L is the order of the filter.
For the MCP3551 device, this notch is located at
55 Hz. For the MCP3553 device, the main notch is
located at 240 Hz, with an OSR of 128. (see Table 4-1).
The digital decimation SINC filter has been modified in
order to offer staggered zeros in its transfer function.
This modification is intended to widen the main notch in
order to be less sensitive to oscillator deviation or
line-frequency drift. The MCP3551 filter has staggered
zeros spread in order to reject both 50 Hz and 60 Hz
line frequencies simulaneously (see Figure 4-2).
TABLE 4-1:
DATA RATE, OUTPUT NOISE AND DIGITAL FILTER SPECIFICATIONS BY DEVICE
Device
Output Data
Rate (t
CONV
)
(Note)
Output
Noise
(μV
RMS
)
2.5
Primary
Notch
(Hz)
Sample
Frequency
(f
S
)
28160 Hz
Internal
Clock
f
OSC
112.64 kHz
50/60 Hz Rejection
MCP3551
72.73 ms
55
-82 dB min. from
48 Hz to 63 Hz.
-82 dB at 50 Hz and
-88 dB at 60 Hz
Not Applicable
MCP3553
Note:
16.67 ms
6
240
30720 Hz
122.88 kHz
For the first conversion after exiting Shutdown, t
CONV
must include an additional 144 f
OSC
periods before
the conversion is complete and the RDY (Ready) flag appears on SDO/RDY.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCP42010T | Single/Dual Digital Potentiometer with SPI⑩ Interface |
| MCP42050T | Single/Dual Digital Potentiometer with SPI⑩ Interface |
| MCP42100 | Single/Dual Digital Potentiometer with SPI⑩ Interface |
| MCP42100T | Single/Dual Digital Potentiometer with SPI⑩ Interface |
| MCP41010 | Single/Dual Digital Potentiometer with SPI⑩ Interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCP3551-E/MS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 22-bit ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3551-E/SN | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 22-bit ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MCP3551-ESN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs |
| MCP3551T | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Low-Power, Single-Channel 22-Bit Delta-Sigma ADCs |
| MCP3551T-50I/MS | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 13-bit Diff In 4 Chl RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。