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| 型號： | MCP3422A0T-E/SN |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 55/58頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT 3.75SPS 2CH 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | MCP3901 Analog Front End |
| 標(biāo)準(zhǔn)包裝： | 3,300 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 3.75 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 4 個(gè)單端，雙極；2 個(gè)差分，雙極 |
| 配用： | MCP3422EV-ND - BOARD EVAL MCP3422 PICKIT SERIAL |
| 其它名稱： | MCP3422A0T-E/SNTR |
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MCP3422/3/4
DS22088C-page 6
2009 Microchip Technology Inc.
PGA Gain Error Match (Note 6)
—
0.1
—
%
Between any 2 PGA settings
Gain Error Drift (Note 6)
—
15
—
ppm/°C
PGA=1, DR=3.75 SPS
Offset Error
VOS
—
15
55
V
Tested at PGA = 1
DR = 3.75 SPS
Offset Drift vs. Temperature
—
50
—
nV/°C
Common-Mode Rejection
—
105
—
dB
at DC and PGA =1,
—
110
—
dB
at DC and PGA =8, TA = +25°C
Gain vs. VDD
—
5
—
ppm/V
TA = +25°C, VDD = 2.7V to 5.5V,
PGA = 1
Power Supply Rejection at DC
Input
—
100
—
dB
TA = +25°C, VDD = 2.7V to 5.5V,
PGA = 1
Power Requirements
Voltage Range
VDD
2.7
—
5.5
V
Supply Current during
Conversion
IDDA
—
145
180
A
VDD = 5.0V
—
135
—
A
VDD = 3.0V
Supply Current during Standby
Mode
IDDS
—0.3
1
A
VDD = 5.0V
I2C Digital Inputs and Digital Outputs
High level input voltage
VIH
0.7VDD
—VDD
V
at SDA and SCL pins
Low level input voltage
VIL
—
0.3VDD
V
at SDA and SCL pins
Low level output voltage
VOL
——
0.4
V
IOL = 3 mA
Hysteresis of Schmidt Trigger
for inputs (Note 7)
VHYST
0.05VDD
——
V
fSCL = 100 kHz
Supply Current when I2C bus
line is active
IDDB
—
10
A
Device is in standby mode while
I2C bus is active
Input Leakage Current
IILH
——
1
A
VIH = 5.5V
IILL
-1
—
A
VIL = GND
Adr0 and Adr1 Pins
Addr_Low
VSS
—0.2VDD
V
The device reads logic low.
Adr0 and Adr1 Pins
Addr_High
0.75VDD
—VDD
V
The device reads logic high.
Adr0 and Adr1 Pins
Addr_Float
0.35VDD
—0.6VDD
V
Read pin voltage if voltage is
applied to the address pin.
—VDD/2
—
Device outputs float output
voltage (VDD/2) on the address
pin, if left “floating”. (Note 10)
Pin Capacitance and I2C Bus Capacitance
Pin capacitance
CPIN
—4
10
pF
I2C Bus Capacitance
Cb
——
400
pF
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all parameters apply for TA = -40°C to +85°C, VDD = +5.0V, VSS = 0V,
CHn+ = CHn- = VREF/2, VINCOM = VREF /2. All ppm units use 2*VREF as differential full scale range.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Note
1:
Any input voltage below or greater than this voltage causes leakage current through the ESD diodes at the input pins.
This parameter is ensured by characterization and not 100% tested.
2:
This input impedance is due to 3.2 pF internal input sampling capacitor.
3:
This parameter is ensured by design and not 100% tested.
4:
The total conversion speed includes auto-calibration of offset and gain.
5:
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
6:
Includes all errors from on-board PGA and VREF.
7:
This parameter is ensured by characterization and not 100% tested.
8:
MCP3423 and MCP3424 only.
9:
Addr_Float voltage is applied at address pin.
10: No voltage is applied at address pin (left “floating”).
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