參數(shù)資料
型號： MCP3422A0T-E/SN
廠商： Microchip Technology
文件頁數(shù)： 11/58頁
文件大?。?/td> 0K
描述： IC ADC 18BIT 3.75SPS 2CH 8-SOIC
產(chǎn)品培訓模塊： MCP3901 Analog Front End
標準包裝： 3,300
位數(shù)： 18
采樣率（每秒）： 3.75
數(shù)據(jù)接口： I²C，串行
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應商設備封裝： 8-SOICN
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個單端，雙極；2 個差分，雙極
配用： MCP3422EV-ND - BOARD EVAL MCP3422 PICKIT SERIAL
其它名稱： MCP3422A0T-E/SNTR
2009 Microchip Technology Inc.
DS22088C-page 19
MCP3422/3/4
If the configuration byte is read repeatedly by clocking
continuously after reading the data bytes (i.e., after the
5th byte in the 18-bit conversion mode), the state of the
RDY bit indicates whether the device is ready with new
conversion result. When the Master finds the RDY bit is
cleared, it can send a not-acknowledge (NAK) bit and
a stop bit to exit the current read operation and send a
new read command for the latest conversion data.
Once the conversion data has been read, the ready bit
toggles to ‘1’ until the next new conversion data is
ready. The conversion data in the output register is
overwritten every time a new conversion is completed.
Figure 5-4 and Figure 5-5 show the examples of
reading the conversion data. The user can rewrite the
configuration byte any time for a new setting. Table 5-1
and Table 5-2 show the examples of the configuration
bit operation.
5.3
I2C Serial Communications
The
device
communicates
with
Master
(microcontroller) through a serial I2C (Inter-Integrated
Circuit) interface and support standard (100 kbits/sec),
fast (400 kbits/sec) and high-speed (3.4 Mbits/sec)
modes. The serial I2C is a bidirectional 2-wire data bus
communication protocol using open-drain SCL and
SDA lines.
The device can only be addressed as a slave. Once
addressed, it can receive configuration bits with a write
command or transmit the latest conversion results with
a read command. The serial clock pin (SCL) is an input
only and the serial data pin (SDA) is bidirectional. The
Master starts communication by sending a START bit
and terminates the communication by sending a STOP
bit. In read mode, the device releases the SDA line
after receiving NAK and STOP bits.
An example of a hardware connection diagram is
shown in Figure 6-1. More details of the I2C bus
characteristic is described in Section 5.6 “I2C Bus
5.3.1
I2C DEVICE ADDRESSING
The first byte after the START bit is always the address
byte of the device, which includes the device code
(4 bits), address bits (3 bits), and R/W bit. The device
code for the devices is 1101, which is programmed at
the factory. The I2C address bits (A2, A1, A0 bits) for
the MCP3423 and MCP3424 are user configurable and
determined by the logic status of the two external
address selection pins on the user’s application board
(Adr0 and Adr1 pins). The Master must know the Adr0
and Adr1 pin conditions before sending read or write
command. Figure 5-1 shows the details of the address
byte.
The three I2C address bits allow up to eight devices on
the same I2C bus line. The (R/W) bit determines if the
Master device wants to read the conversion data or
write to the Configuration register. If the (R/W) bit is set
(read mode), the device outputs the conversion data in
the following clocks. If the (R/W) bit is cleared (write
mode), the device expects a configuration byte in the
following clocks. When the device receives the correct
address byte, it outputs an acknowledge bit after the R/
W bit.
Figure 5-1 shows the address byte. Figure 5-3 through
Figure 5-5 show how to write the configuration register
bits and read the conversion results.
TABLE 5-1:
WRITE CONFIGURATION BITS
R/W O/C
RDY
Operation
00
0
No effect if all other bits remain
the same - operation continues
with the previous settings.
00
1
Initiate One-Shot Conversion.
01
0
Initiate Continuous Conversion.
01
1
Initiate Continuous Conversion.
TABLE 5-2:
READ CONFIGURATION BITS
R/W O/C
RDY
Operation
10
0
New conversion result in
One-Shot conversion mode has
just been read. The RDY bit
remains low until set by a new
write command.
10
1
One-Shot Conversion is in
progress. The conversion result
is not updated yet. The RDY bit
stays high until the current
conversion is completed.
11
0
New conversion result in
Continuous Conversion mode
has just been read. The RDY bit
changes to high after reading the
conversion data.
11
1
The conversion result in
Continuous Conversion mode
was already read. The next new
conversion data is not ready. The
RDY bit stays high until a new
conversion is completed.
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