V
參數(shù)資料
型號： MCP3201-CI/MS
廠商： Microchip Technology
文件頁數(shù)： 23/40頁
文件大?。?/td> 0K
描述： IC ADC 12BIT 2.7V 1CH SPI 8MSOP
標(biāo)準(zhǔn)包裝： 100
位數(shù)： 12
采樣率（每秒）： 100k
數(shù)據(jù)接口： 串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 8-TSSOP，8-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 8-MSOP
包裝： 管件
輸入數(shù)目和類型： 1 個單端，單極
1998-2011 Microchip Technology Inc.
DS21290F-page 3
MCP3201
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Maximum Ratings
VDD...................................................................................7.0V
All inputs and outputs w.r.t. VSS ................ -0.6V to VDD +0.6V
Storage temperature .....................................-65°C to +150°C
Ambient temp. with power applied ................-65°C to +125°C
ESD protection on all pins (HBM) .................................> 4 kV
Notice:
Stresses above those listed under “Maximum
ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications:
All parameters apply at VDD = 5V, VSS = 0V, VREF = 5V, TA = -40°C to +85°C, fSAMPLE = 100 ksps, and
fCLK = 16*fSAMPLE, unless otherwise noted.
Parameter
Sym
Min
Typ
Max
Units
Conditions
Conversion Rate:
Conversion Time
tCONV
—
12
clock
cycles
Analog Input Sample Time
tSAMPLE
1.5
clock
cycles
Throughput Rate
fSAMPLE
—
100
50
ksps
VDD = VREF = 5V
VDD = VREF = 2.7V
DC Accuracy:
Resolution
12
bits
Integral Nonlinearity
INL
—
±0.75
±1
±2
LSB
MCP3201-B
MCP3201-C
Differential Nonlinearity
DNL
—
±0.5
±1
LSB
No missing codes over
temperature
Offset Error
—
±1.25
±3
LSB
Gain Error
—
±1.25
±5
LSB
Dynamic Performance:
Total Harmonic Distortion
THD
—
-82
—
dB
VIN = 0.1V to 4.9V@1 kHz
Signal to Noise and Distortion
(SINAD)
SINAD
—
72
—
dB
VIN = 0.1V to 4.9V@1 kHz
Spurious Free Dynamic Range
SFDR
—
86
—
dB
VIN = 0.1V to 4.9V@1 kHz
Reference Input:
Voltage Range
0.25
—
VDD
V
Current Drain
—
100
.001
150
3
A
CS = VDD = 5V
Analog Inputs:
Input Voltage Range (IN+)
IN+
IN-
—
VREF+IN-
V
Input Voltage Range (IN-)
IN-
VSS-100
VSS+100
mV
Leakage Current
—
0.001
±1
A
Switch Resistance
RSS
—
1K
—
W
Sample Capacitor
CSAMPLE
—
20
—
pF
Digital Input/Output:
Data Coding Format
Straight Binary
High Level Input Voltage
VIH
0.7 VDD
——
V
Low Level Input Voltage
VIL
—
0.3 VDD
V
Note 1:
This parameter is established by characterization and not 100% tested.
2:
See graph that relates linearity performance to VREF level.
3:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity performance,
especially at elevated temperatures. See Section 6.2 “Maintaining Minimum Clock Speed” for more information.
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