參數(shù)資料
型號(hào)： MCP23S09T-E/MG
廠商： Microchip Technology
文件頁數(shù)： 14/50頁
文件大?。?/td> 0K
描述： IC I/O EXPANDER SPI 8B 16QFN
標(biāo)準(zhǔn)包裝： 3,300
接口： SPI
輸入/輸出數(shù)： 8
中斷輸出： 是
頻率 - 時(shí)鐘： 10MHz
電源電壓： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝： 16-QFN-EP（3x3）
包裝： 帶卷 (TR)
2009 Microchip Technology Inc.
DS22121B-page 21
MCP23009/MCP23S09
1.6.6
CONFIGURATION REGISTER
The Sequential Operation (SEQOP) controls the
incrementing function of the address pointer. If the
address pointer is disabled, the address pointer does
not automatically increment after each byte is clocked
during a serial transfer. This feature is useful when it is
desired to continuously poll (read) or modify (write) a
register.
The Open-Drain (ODR) control bit enables/disables the
INT pin for open-drain configuration.
The Interrupt Polarity (INTPOL) sets the polarity of the
INT pin. This bit is functional only when the ODR bit is
cleared, configuring the INT pin as active push-pull.
The Interrupt Clearing Control (INTCC) configures how
interrupts are cleared. When set (INTCC = 1), the
interrupt is cleared when the INTCAP register is read.
When cleared (INTCC = 0), the interrupt is cleared
when the GPIO register is read.
The interrupt can only be cleared when the interrupt
condition is inactive. Refer to Section 1.7.4 “Clearing
Interrupts” for details.
REGISTER 1-6:
IOCON – I/O EXPANDER CONFIGURATION REGISTER
U-0
R/W-0
U-0
R/W-0
-
SEQOP
-
ODR
INTPOL
INTCC
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
Unimplemented: Reads as 0
bit 6
Unimplemented: Reads as 0
bit 5
SEQOP: Sequential Operation mode bit.
1
= Sequential operation disabled, address pointer does not increment
0
= Sequential operation enabled, address pointer increments
bit 4
Unimplemented: Reads as 0
bit 3
Unimplemented: Reads as 0
bit 2
ODR: Configures the INT pin as an open-drain output.
1
= Open-drain output (overrides the INTPOL bit)
0
= Active driver output (INTPOL bit sets the polarity)
bit 1
INTPOL: Sets the polarity of the INT output pin.
1
= Active-high
0
= Active-low
bit 0
INTCC: Interrupt Clearing Control
1 = Reading INTCAP register clears the interrupt
0 = Reading GPIO register clears the interrupt
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