參數資料
型號: MCF54418CMJ250
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, PBGA256
封裝: 12 X 12 MM, ROHS COMPLAINT, MAPBGA-256
文件頁數: 49/60頁
文件大?。?/td> 1107K
代理商: MCF54418CMJ250
Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 6
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
53
4.26
1-Wire timing specifications
Specifications for the 1-Wire interface are provided by Maxim Integrated Products, Inc. Please refer to data sheet information
for the appropriate device at www.maxim-ic.com.
4.27
General purpose I/O timing specifications
Figure 35. GPIO timing
4.28
Rapid general purpose I/O timing specifications
RGPIO signals use a mix of pad types: pad_fsr, pad_msr, and pad_ssr. The following timing specifications assume a pad slew
rate setting of 11 and a load of 50 pF.
Table 38. GPIO timing1
1 These general purpose specifications apply to the following signals: IRQn, all UART signals, all timer
signals, FlexCAN signals, DACKn and DREQn, and all signals configured as GPIO.
Num
Characteristic
Min
Max
Unit
G1
FB_CLK high to GPIO output valid
9
ns
G2
FB_CLK high to GPIO output invalid
1
ns
G3
GPIO input valid to FB_CLK high
9
ns
G4
FB_CLK high to GPIO input invalid
1.5
ns
Table 39. RGPIO timing
Num
Characteristic
Min
Max
Unit
RG1
PST_CLK high to RGPIO output valid
6
ns
RG2
PST_CLK high to RGPIO output Invalid
0.5
ns
RG3
RGPIO input valid to PST_CLK high
6
ns
RG4
PST_CLK high to RGPIO input invalid
1.5
ns
G1
FB_CLK
GPIO Outputs
G2
G3
G4
GPIO Inputs
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