參數(shù)資料
型號: MCF52221
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: Microcontroller Data Sheet
中文描述: 微控制器數(shù)據(jù)表
文件頁數(shù): 25/56頁
文件大?。?/td> 811K
代理商: MCF52221
MCF52223 Family Configurations
MCF52223 ColdFire Microcontroller Data Sheet, Rev. 1
Preliminary
Freescale Semiconductor
25
1.11 I
2
C I/O Signals
Table 10
describes the I
2
C serial interface module signals.
1.12 UART Module Signals
Table 11
describes the UART module signals.
1.13 DMA Timer Signals
Table 12
describes the signals of the four DMA timer modules.
Table 10. I
2
C I/O Signals
Signal Name
Abbreviation
Function
I/O
Serial Clock
SCL
Open-drain clock signal for the for the I
2
C interface. Either it is driven
by the I
2
C module when the bus is in master mode or it becomes the
clock input when the I
2
C is in slave mode.
I/O
Serial Data
SDA
Open-drain signal that serves as the data input/output for the I
2
C
interface.
I/O
Table 11. UART Module Signals
Signal Name
Abbreviation
Function
I/O
Transmit Serial Data
Output
UTXD
n
Transmitter serial data outputs for the UART modules. The output is
held high (mark condition) when the transmitter is disabled, idle, or in
the local loopback mode. Data is shifted out, LSB first, on this pin at
the falling edge of the serial clock source.
O
Receive Serial Data
Input
URXD
n
Receiver serial data inputs for the UART modules. Data is received on
this pin LSB first. When the UART clock is stopped for power-down
mode, any transition on this pin restarts it.
I
Clear-to-Send
UCTS
n
Indicate to the UART modules that they can begin data transmission.
I
Request-to-Send
URTS
n
Automatic request-to-send outputs from the UART modules. This
signal can also be configured to be asserted and negated as a
function of the RxFIFO level.
O
Table 12. DMA Timer Signals
Signal Name
Abbreviation
Function
I/O
DMA Timer Input
DTIN
Event input to the DMA timer modules.
I
DMA Timer Output
DTOUT
Programmable output from the DMA timer modules.
O
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