Chapter 5 Resets, Interrupts, and General System Control
MC9S08SH8 MCU Series Data Sheet, Rev. 3
64
Freescale Semiconductor
When an interrupt condition occurs, an associated ag bit becomes set. If the associated local interrupt
enable is 1, an interrupt request is sent to the CPU. Within the CPU, if the global interrupt mask (I bit in
the CCR) is 0, the CPU will nish the current instruction; stack the PCL, PCH, X, A, and CCR CPU
registers; set the I bit; and then fetch the interrupt vector for the highest priority pending interrupt.
Processing then continues in the interrupt service routine.
Table 5-2. Vector Summary
Vector
Priority
Vector
Number
Address
(High/Low)
Vector
Name
Module
Source
Enable
Description
Lowest
Highest
31
0xFFC0/0xFFC1
—
30
0xFFC2/0xFFC3
Vacmp
ACMP
ACF
ACIE
Analog comparator
29
0xFFC4/0xFFC5
—
28
0xFFC6/0xFFC7
—
27
0xFFC8/0xFFC9
—
26
0xFFCA/0xFFCB
Vmtim
MTIM
TOF
TOIE
MTIM overow
25
0xFFCC/0xFFCD
Vrtc
RTC
RTIF
RTIE
Real-time interrupt
24
0xFFCE/0xFFCF
Viic
IIC
IICIF
IICIE
IIC control
23
0xFFD0/0xFFD1
Vadc
ADC
COCO
AIEN
ADC
22
0xFFD2/0xFFD3
—
21
0xFFD4/0xFFD5
Vportb
Port B
PTBIF
PTBIE
Port B Pins
20
0xFFD6/0xFFD7
Vporta
Port A
PTAIF
PTAIE
Port A Pins
19
0xFFD8/0xFFD9
—
18
0xFFDA/0xFFDB
Vscitx
SCI
TDRE, TC
TIE, TCIE
SCI transmit
17
0xFFDC/0xFFDD
Vscirx
SCI
IDLE, RDRF,
LBKDIE,
RXEDGIF
ILIE, RIE, LDBKDIF,
RXEDGIE
SCI receive
16
0xFFDE/0xFFDF
Vscierr
SCI
OR, NF,
FE, PF
ORIE, NFIE,
FEIE, PFIE
SCI error
15
0xFFE0/0xFFE1
Vspi
SPI
SPIF, MODF,
SPTEF
SPIE, SPIE, SPTIE
SPI
14
0xFFE2/0xFFE3
Vtpm2ovf
TPM2
TOF
TOIE
TPM2 overow
13
0xFFE4/0xFFE5
Vtpm2ch1
TPM2
CH1F
CH1IE
TPM2 channel 1
12
0xFFE6/0xFFE7
Vtpm2ch0
TPM2
CH0F
CH0IE
TPM2 channel 0
11
0xFFE8/0xFFE9
Vtpm1ovf
TPM1
TOF
TOIE
TPM1 overow
10
0xFFEA/0xFFEB
—
9
0xFFEC/0xFFED
—
8
0xFFEE/0xFFEF
—
7
0xFFF0/0xFFF1
—
6
0xFFF2/0xFFF3
Vtpm1ch1
TPM1
CH1F
CH1IE
TPM1 channel 1
5
0xFFF4/0xFFF5
Vtpm1ch0
TPM1
CH0F
CH0IE
TPM1 channel 0
4
0xFFF6/0xFFF7
—
3
0xFFF8/0xFFF9
Vlvd
System
control
LVWF
LVWIE
Low-voltage warning
2
0xFFFA/0xFFFB
Virq
IRQ
IRQF
IRQIE
IRQ pin
1
0xFFFC/0xFFFD
Vswi
Core
SWI Instruction
—
Software interrupt
0
0xFFFE/0xFFFF
Vreset
System
control
COP,
LVD,
RESET pin,
Illegal opcode,
Illegal address
COPT
LVDRE
—
Watchdog timer
Low-voltage detect
External pin
Illegal opcode
Illegal address