參數(shù)資料
型號： MC9328MX1VH20R2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 200 MHz, RISC PROCESSOR, PBGA256
封裝： 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件頁數(shù)： 67/96頁
文件大?。?/td> 1486K
代理商： MC9328MX1VH20R2
Signals and Connections
MC9328MX1 Advance Information, Rev. 4.1
Freescale Semiconductor
7
DQM [3:0]
SDRAM data enable
CSD0
SDRAM/SyncFlash Chip Select signal which is multiplexed with the CS2 signal. These two signals
are selectable by programming the system control register.
CSD1
SDRAM/SyncFlash Chip Select signal which is multiplex with CS3 signal. These two signals are
selectable by programming the system control register. By default, CSD1 is selected, so it can be
used as SyncFlash boot chip select by properly configuring BOOT [3:0] input pins.
RAS
SDRAM/SyncFlash Row Address Select signal
CAS
SDRAM/SyncFlash Column Address Select signal
SDWE
SDRAM/SyncFlash Write Enable signal
SDCKE0
SDRAM/SyncFlash Clock Enable 0
SDCKE1
SDRAM/SyncFlash Clock Enable 1
SDCLK
SDRAM/SyncFlash Clock
RESET_SF
SyncFlash Reset
Clocks and Resets
EXTAL16M
Crystal input (4 MHz to 16 MHz), or a 16 MHz oscillator input when internal oscillator circuit is shut
down.
XTAL16M
Crystal output
EXTAL32K
32 kHz crystal input
XTAL32K
32 kHz crystal output
CLKO
Clock Out signal selected from internal clock signals. Please refer to clock controller for internal
clock selection.
RESET_IN
Master Reset—External active low Schmitt trigger input signal. When this signal goes active, all
modules (except the reset module and the clock control module) are reset.
RESET_OUT
Reset Out—Internal active low output signal from the Watchdog Timer module and is asserted from
the following sources: Power-on reset, External reset (RESET_IN), and Watchdog time-out.
POR
Power On Reset—Internal active high Schmitt trigger input signal. The POR signal is normally
generated by an external RC circuit designed to detect a power-up event.
JTAG
TRST
Test Reset Pin—External active low signal used to asynchronously initialize the JTAG controller.
TDO
Serial Output for test instructions and data. Changes on the falling edge of TCK.
TDI
Serial Input for test instructions and data. Sampled on the rising edge of TCK.
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
相關(guān)PDF資料
PDF描述
MC9328MX1CVH15 150 MHz, RISC PROCESSOR, PBGA256
MC9328MX1VH20 200 MHz, RISC PROCESSOR, PBGA256
MC9328MX1VH15 150 MHz, MICROPROCESSOR, PBGA256
MC9328MX1VM15 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
MC9328MX1CVM15R2 32-BIT, 150 MHz, RISC PROCESSOR, PBGA256
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC9328MX1VM15 功能描述:IC MCU I.MX 150MHZ 256-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:i.MX1 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
MC9328MX1VM15R2 功能描述:IC MCU I.MX 150MHZ 256-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:i.MX1 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
MC9328MX1VM20 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX1VM20R2 功能描述:處理器 - 專門應(yīng)用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MC9328MX21 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:i.MX family of microprocessors
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