- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98013 > MC92600CJUB (FREESCALE SEMICONDUCTOR INC) SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217 PDF資料下載
參數(shù)資料
| 型號： | MC92600CJUB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217 |
| 封裝： | 23 X 23 MM, 2.32 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-217 |
| 文件頁數(shù)： | 36/98頁 |
| 文件大?。?/td> | 1288K |
| 代理商： | MC92600CJUB |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁當(dāng)前第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁
MOTOROLA
Chapter 3. Receiver
3-13
Device Operations
3.5.4.2
10-Bit Interface Mode
Received data is ten bits of coded data when in TBI mode. The internal 8B/10B decoder is
not used, and it is assumed that decoding is done externally. 10-bit data is made up from the
collection of signals— RECV_x_9, RECV_x_K, and RECV_x_7 through RECV_x_0
making up bits 9 through 0, respectively. 10-bit interface mode is enabled by setting the
TBIE signal high.
The RECV_x_IDLE is asserted when the 10-bit character is the special 8B/10B idle
(K28.5) code. This can be used by system logic for synchronization or data parsing.
RECV_x_IDLE is set low when the data is normal data or a non-idle special code.
The RECV_x_ERR is set low when the receiver is operating normally, and is asserted when
the receiver is in an error state. The state of the RECV_x_IDLE signal is decoded to
determine the error condition. Table 3-6 describes the error codes and their meaning.
The receiver interface is timed to the recovered clock, RECV_x_RCLK, or to the reference
clock, REF_CLK, depending on the state of the RCCE signal.
3.5.4.3
Double Data Rate Mode
Double data rate (DDR) mode, enabled when DDRE is asserted, allows the received data
to be output on the rising and falling edges of a reference or recovered clock. DDR mode
is used to lower reference clock frequency while maintaining throughput, reducing board
design complications. It is important to note that in DDR mode the legal range of reference
clock frequencies is reduced. Table 4-1, "Legal Reference Clock Frequency Ranges” shows
legal reference clock frequencies for all modes of operation.
3.5.4.4
Half-Speed Mode
Half-speed (HS) mode, enabled when HSE is asserted, operates the receiver in its lower
speed range. In HS mode, the link speed is 500 Mbps (625 Mbaud.) The receiver interface
operates at half speed as well, in pace with received data.
3.5.4.5
Repeater Mode
Repeater mode congures the MC92600 into a 4-link receive-transmit repeater. In this
mode, received data is forwarded to the transmitter for re-transmission. Link A’s receiver
forwards to link A’s transmitter, link B’s receiver to link B’s transmitter, and so on. The
receiver’s data outputs and status signals reect the received data and the current status of
the receiver. See Section 2.3.2, “Repeater Mode” for more information on repeater mode.
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC92600ZTB | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196 |
| MC92600JUB | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217 |
| MC92602ZTA | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA196 |
| MC9S08AC16CFDE | 8-BIT, FLASH, 40 MHz, MICROCONTROLLER, BCC48 |
| MC9S08GW32CLH | MICROCONTROLLER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC92600JUB | 功能描述:IC SERDES QUAD 1.25GBAUD 217PBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 串行器，解串行器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 功能:解串器 數(shù)據(jù)速率:2.5Gbps 輸入類型:串行 輸出類型:并聯(lián) 輸入數(shù):- 輸出數(shù):24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP（10x10） 包裝:管件 |
| MC92600VMB | 制造商:Freescale Semiconductor 功能描述: |
| MC92603VF | 功能描述:IC TXRX ETH QUAD GIG 256-MAPBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:25 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| MC92603VM | 功能描述:IC ETH TXRX QUAD GIG 256-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC92604VM | 功能描述:IC ETH TXRX DUAL GIG 196-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類型:收發(fā)器 驅(qū)動器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。