參數(shù)資料
型號(hào): MC8641DVU1250JB
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁(yè)數(shù): 50/140頁(yè)
文件大?。?/td> 1484K
代理商: MC8641DVU1250JB
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
17
Input Clocks
It is imperative to note that the processor’s minimum and maximum SYSCLK, core, and VCO frequencies
must not be exceeded regardless of the type of clock source. Therefore, systems in which the processor is
operated at its maximum rated e600 core frequency should avoid violating the stated limits by using
down-spreading only.
SDn_REF_CLK and SDn_REF_CLK was designed to work with a spread spectrum clock (+0 to 0.5%
spreading at 30-33kHz rate is allowed), assuming both ends have same reference clock. For better results
use a source without significant unintended modulation.
4.2
Real Time Clock Timing
The RTC input is sampled by the platform clock (MPX clock). The output of the sampling latch is then
used as an input to the counters of the PIC. There is no jitter specification. The minimum pulse width of
the RTC signal should be greater than 2x the period of the MPX clock. That is, minimum clock high time
is 2
× tMPX, and minimum clock low time is 2 × tMPX. There is no minimum RTC frequency; RTC may be
grounded if not needed.
4.3
eTSEC Gigabit Reference Clock Timing
Table 10 provides the eTSEC gigabit reference clocks (EC1_GTX_CLK125 and EC2_GTX_CLK125) AC
timing specifications for the MPC8641.
Table 9. Spread Spectrum Clock Source Recommendations
At recommended operating conditions. See Table 2.
Parameter
Min
Max
Unit
Notes
Frequency modulation
50
kHz
1
Frequency spread
1.0
%
1, 2
Notes:
1. Guaranteed by design.
2. SYSCLK frequencies resulting from frequency spreading, and the resulting core and VCO
frequencies, must meet the minimum and maximum specifications given in Table 8.
Table 10. EC
n_GTX_CLK125 AC Timing Specifications
Parameter/Condition
Symbol
Min
Typical
Max
Unit
Notes
EC
n_GTX_CLK125 frequency
fG125
125 ±100
ppm
—MHz
3
EC
n_GTX_CLK125 cycle time
tG125
—8
ns
EC
n_GTX_CLK125 peak-to-peak jitter
tG125J
250
ps
1
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