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| 型號(hào)： | MC8641DTHX1333JE |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 25/130頁(yè) |
| 文件大小： | 0K |
| 描述： | IC DUAL CORE PROCESSOR 1023-CBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MPC86xx |
| 處理器類型： | 32-位 MPC86xx PowerPC |
| 速度： | 1.333GHz |
| 電壓： | 1.05V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 1023-BCBGA，F(xiàn)CCBGA |
| 供應(yīng)商設(shè)備封裝： | 1023-FCCBGA（33x33） |
| 包裝： | 托盤 |
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
120
Freescale Semiconductor
System Design Information
Local Bus - If parity is not used, tie LDP[0:3] to ground via a 4.7 k
Ω resistor, tie LPBSE to OVDD
via a 4.7 k
Ω resistor (pull-up resistor). For systems which boot from Local Bus (GPCM)-controlled
flash, a pullup on LGPL4 is required.
SerDes - Receiver lanes configured for PCI Express are allowed to be disconnected (as would
occur when a PCI Express slot is connected but not populated). Directions for terminating the
SerDes signals is discussed in Section 20.5.1, “Guidelines for High-Speed Interface Termination.”
20.5.1
Guidelines for High-Speed Interface Termination
20.5.1.1
SerDes Interface
The high-speed SerDes interface can be disabled through the POR input cfg_io_ports[0:3] and through the
DEVDISR register in software. If a SerDes port is disabled through the POR input the user can not enable
it through the DEVDISR register in software. However, if a SerDes port is enabled through the POR input
the user can disable it through the DEVDISR register in software. Disabling a SerDes port through
software should be done on a temporary basis. Power is always required for the SerDes interface, even if
the port is disabled through either mechanism. Table 72 describes the possible enabled/disabled scenarios
for a SerDes port. The termination recommendations must be followed for each port.
If the high-speed SerDes port requires complete or partial termination, the unused pins should be
terminated as described in this section.
The following pins must be left unconnected (floating):
SDn_TX[7:0]
Table 72. SerDes Port Enabled/Disabled Configurations
Disabled through POR input
Enabled through POR input
Enabled through DEVDISR
SerDes port is disabled (and cannot be
enabled through DEVDISR)
Complete termination required
(Reference Clock not required)
SerDes port is enabled
Partial termination may be required1
(Reference Clock is required)
1 Partial Termination when a SerDes port is enabled through both POR input and DEVDISR is determined by the
SerDes port mode. If the port is in x8 PCI Express mode, no termination is required because all pins are being used.
If the port is in x1/x2/x4 PCI Express mode, termination is required on the unused pins. If the port is in x4 Serial
RapidIO mode termination is required on the unused pins.
Disabled through DEVDISR
SerDes port is disabled (through POR
input)
Complete termination required
(Reference Clock not required)
SerDes port is disabled after software
disables port
Same termination requirements as when
the port is enabled through POR input2
(Reference Clock is required)
2 If a SerDes port is enabled through the POR input and then disabled through DEVDISR, no hardware changes are
required. Termination of the SerDes port should follow what is required when the port is enabled through both POR
input and DEVDISR. See Note 1 for more information.
Notes:
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC8641DTHX1250HE | IC DUAL CORE PROCESSOR 1023-CBGA |
| 346-020-521-201 | CARDEDGE 20POS DUAL .125 GREEN |
| 346-020-520-804 | CARDEDGE 20POS DUAL .125 GREEN |
| 346-020-520-802 | CARDEDGE 20POS DUAL .125 GREEN |
| 346-020-520-204 | CARDEDGE 20POS DUAL .125 GREEN |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC8641DTHX1333N | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications Addendum for the MC8641xTxxnnnnxC Series |
| MC8641DTVU1000G | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications Addendum for the MC8641xTxxnnnnxC Series |
| MC8641DTVU1000GC | 功能描述:微處理器 - MPU G8,REV2.1 1.05V,-40/105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC8641DTVU1000GE | 功能描述:微處理器 - MPU G8 REV3.0 0.95V 105C RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC8641DTVU1000H | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Integrated Host Processor Hardware Specifications Addendum for the MC8641xTxxnnnnxC Series |
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