參數(shù)資料
型號： MC8641DHX1500NC
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, ROHS COMPLIANT, CERAMIC, BGA-1023
文件頁數(shù)： 70/140頁
文件大?。?/td> 1484K
代理商： MC8641DHX1500NC
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 0
Freescale Semiconductor
35
Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management
Figure 13. MII Transmit AC Timing Diagram
8.2.3.2
MII Receive AC Timing Specifications
Table 31 provides the MII receive AC timing specifications.
Figure 14 provides the AC test load for eTSEC.
Figure 14. eTSEC AC Test Load
Table 31. MII Receive AC Timing Specifications
At recommended operating conditions with L/TVDD of 3.3 V ± 5%.
Parameter/Condition
Symbol 1
Min
Typ
Max
Unit
RX_CLK clock period 10 Mbps
tMRX
2,3
—400
—
ns
RX_CLK clock period 100 Mbps
tMRX
3
—40
—
ns
RX_CLK duty cycle
tMRXH/tMRX
35
—
65
%
RXD[3:0], RX_DV, RX_ER setup time to RX_CLK
tMRDVKH
10.0
—
ns
RXD[3:0], RX_DV, RX_ER hold time to RX_CLK
tMRDXKH
10.0
—
ns
RX_CLK clock rise time (20%-80%)
tMRXR
2
1.0—
4.0ns
RX_CLK clock fall time (80%-20%)
tMRXF
2
1.0—
4.0ns
Note:
1. The symbols used for timing specifications herein follow the pattern of t(first two letters of functional block)(signal)(state) (reference)(state)
for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tMRDVKH symbolizes MII receive
timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the tMRX clock reference (K)
going to the high (H) state or setup time. Also, tMRDXKL symbolizes MII receive timing (GR) with respect to the time data input
signals (D) went invalid (X) relative to the tMRX clock reference (K) going to the low (L) state or hold time. Note that, in general,
the clock reference symbol representation is based on three letters representing the clock of a particular functional. For
example, the subscript of tMRX represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is used
with the appropriate letter: R (rise) or F (fall).
2. Guaranteed by design.
3. ±100 ppm tolerance on RX_CLK frequency
TX_CLK
TXD[3:0]
tMTKHDX
tMTX
tMTXH
tMTXR
tMTXF
TX_EN
TX_ER
Output
Z0 = 50 Ω
LVDD/2
RL = 50 Ω
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