參數(shù)資料
型號： MC8640VU1067NC
廠商： Freescale Semiconductor
文件頁數(shù)： 38/130頁
文件大?。?/td> 0K
描述： MPU DUAL E600 994-FCCBGA
標(biāo)準(zhǔn)包裝： 1
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.067GHz
電壓： 0.95V
安裝類型： 表面貼裝
封裝/外殼： 994-BCBGA，F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝： 994-FCCBGA（33x33）
包裝： 托盤
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
Freescale Semiconductor
15
Input Clocks
4
Input Clocks
Table provides the system clock (SYSCLK) DC specifications for the MPC8640.
4.1
System Clock Timing
Table 8 provides the system clock (SYSCLK) AC timing specifications for the MPC8640.
Typical
1067 MHz
533 MHz
0.95 V,
1.05 V
65 oC
10.1
1, 2, 5
Thermal
105 oC
12.3
1, 3, 5
Maximum
14
1, 4, 5
Notes:
1. These values specify the power consumption at nominal voltage and apply to all valid processor bus frequencies and
configurations. The values do not include power dissipation for I/O supplies.
2. Typical power is an average value measured at the nominal recommended core voltage (VDD_Coren) and 65 °C junction
temperature (see Table 2) while running the Dhrystone 2.1 benchmark and achieving 2.3 Dhrystone MIPs/MHz.
3. Thermal power is the average power measured at nominal core voltage (VDD_Coren) and maximum operating junction
temperature (see Table 2) while running the Dhrystone 2.1 benchmark and achieving 2.3 Dhrystone MIPs/MHz and a typical
workload on platform interfaces.
4. Maximum power is the maximum power measured at nominal core voltage (VDD_Coren) and maximum operating junction
temperature (see Table 2) while running a test which includes an entirely L1-cache-resident, contrived sequence of
instructions which keep all the execution units maximally busy.
5. These power numbers are for Part Number MC8640Dwxx1067Nz and MC8640wxx1067Nz only. VDD_Coren = 0.95 V and
VDD_PLAT = 1.05 V.
Table 7. SYSCLK DC Electrical Characteristics (OVDD = 3.3 V ± 165 mV)
Parameter
Symbol
Min
Max
Unit
High-level input voltage
VIH
2OVDD + 0.3
V
Low-level input voltage
VIL
–0.3
0.8
V
Input current
(VIN
1 = 0 V or V
IN = VDD)
IIN
—±5
μA
Note:
1. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2.
Table 8. SYSCLK AC Timing Specifications
At recommended operating conditions (see Table 2) with OVDD = 3.3 V ± 165 mV.
Parameter
Symbol
Min
Typical
Max
Unit
Notes
SYSCLK frequency
fSYSCLK
66
—
166.66
MHz
1
SYSCLK cycle time
tSYSCLK
6—
—
ns
—
SYSCLK rise and fall time
tKH, tKL
0.6
1.0
1.2
ns
2
Table 6. MPC8640 Power Dissipation (Single Core) (continued)
Power Mode
Core Frequency
(MHz)
Platform
Frequency (MHz)
VDD_Coren,
VDD_PLAT
(Volts)
Junction
Temperature
Power
(Watts)
Notes
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