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參數(shù)資料
| 型號(hào)： | MC80C52CXXX-30P883 |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CDIP40 |
| 文件頁(yè)數(shù)： | 21/81頁(yè) |
| 文件大?。?/td> | 663K |
| 代理商： | MC80C52CXXX-30P883 |
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28
ATtiny28L/V
1062F–AVR–07/06
AIN1 – Port B, Bit 1
AIN1, Analog Comparator Negative input. When the on-chip analog comparator is
enabled, this pin also serves as the negative input of the comparator. If the analog com-
parator is enabled, the pull-up resistors on PB1 and PB0 are disabled and these pins will
not give low-level interrupts.
AIN0 – Port B, Bit 0
AIN0, Analog Comparator Positive input. When the on-chip analog comparator is
enabled, this pin also serves as the positive input of the comparator. If the analog com-
parator is enabled, the pull-up resistors on PB1 and PB0 are disabled and these pins will
not give low-level interrupts.
Port B Schematics
Note that all port pins are synchronized. The synchronization latches are, however, not
shown in the figures.
Figure 23. Port B Schematic Diagram (Pins PB0 and PB1)
DA
T
A
BUS
MOS
PULL-
UP
PBn
RP: READ PORTB PIN
n : 0, 1
PULL-UP PORT B
COMPARATOR DISABLE
RP
TO LOW-LEVEL DETECTOR
TO COMPARATOR
AINn
PWRDN
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