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| 型號(hào)： | MC7457VG867NC |
| 廠(chǎng)商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 49/71頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU RISC 867MHZ 483FCCBGA |
| 標(biāo)準(zhǔn)包裝： | 36 |
| 系列： | MPC74xx |
| 處理器類(lèi)型： | 32-位 MPC74xx PowerPC |
| 速度： | 867MHz |
| 電壓： | 1.1V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 483-BCBGA，F(xiàn)CCBGA |
| 供應(yīng)商設(shè)備封裝： | 483-FCCBGA（29x29） |
| 包裝： | 托盤(pán) |
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System Design Information
MPC7457 RISC Microprocessor Hardware Specifications, Rev. 8
Freescale Semiconductor
53
9.1.3
System Bus Clock (SYSCLK) and Spread Spectrum Sources
Spread spectrum clock sources are an increasingly popular way to control electromagnetic interference
emissions (EMI) by spreading the emitted noise to a wider spectrum and reducing the peak noise
magnitude in order to meet industry and government requirements. These clock sources intentionally add
long-term jitter in order to diffuse the EMI spectral content. The jitter specification given in Table 8
considers short-term (cycle-to-cycle) jitter only and the clock generator’s cycle-to-cycle output jitter
should meet the MPC7457 input cycle-to-cycle jitter requirement. Frequency modulation and spread are
separate concerns, and the MPC7457 is compatible with spread spectrum sources if the recommendations
listed in Table 20 are observed.
It is imperative to note that the processor’s minimum and maximum SYSCLK, core, and VCO frequencies
must not be exceeded regardless of the type of clock source. Therefore, systems in which the processor is
operated at its maximum rated core or bus frequency should avoid violating the stated limits by using
down-spreading only.
1050
525
420
350
300
263
233
191
175
162
150
140
131
1100
550
440
367
314
275
244
200
183
169
157
147
138
1150
575
460
383
329
288
256
209
192
177
164
153
144
1200
600
480
400
343
300
267
218
200
185
171
160
150
1250
638
500
417
357
313
278
227
208
192
179
167
156
1300
650
520
433
371
325
289
236
217
200
186
173
163
Notes:
1. The core and L3 frequencies are for reference only. Note that maximum L3 frequency is design dependent. Some examples
may represent core or L3 frequencies which are not useful, not supported, or not tested for the MPC7457; see Section 5.2.3,
“L3 Clock AC Specifications,” for valid L3_CLK frequencies and for more information regarding the maximum L3 frequency.
2. Not all core frequencies are supported by all speed grades; see Table 8 for minimum and maximum core frequency
specifications.
Table 20. Spread Specturm Clock Source Recommendations
At recommended operating conditions. See Table 4.
Parameter
Min
Max
Unit
Notes
Frequency modulation
—
50
kHz
1
Frequency spread
—
1.0
%
1, 2
Notes:
1. Guaranteed by design.
2. SYSCLK frequencies resulting from frequency spreading, and the resulting core and VCO
frequencies, must meet the minimum and maximum specifications given in Table 8.
Table 19. Sample Core-to-L3 Frequencies 1 (continued)
Core
Frequency
(MHz) 2
÷2
÷2.5
÷3
÷3.5
÷4
÷4.5
÷5
÷5.5
÷6
÷6.5
÷7
÷7.5
÷8
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