參數(shù)資料
型號(hào)： MC7455ARX867LG
廠(chǎng)商： MOTOROLA INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 32-BIT, 867 MHz, RISC PROCESSOR, CBGA483
封裝： 29 X 29 MM, 1.27 MM PITCH, CERAMIC, BGA-483
文件頁(yè)數(shù)： 42/76頁(yè)
文件大?。?/td> 1520K
代理商： MC7455ARX867LG
MOTOROLA
MPC7455 RISC Microprocessor Hardware Specifications
47
System Design Information
1.9
System Design Information
This section provides system and thermal design recommendations for successful application of the
MPC7455.
1.9.1
PLL Configuration
The MPC7455 PLL is configured by the PLL_CFG[0:4] signals. For a given SYSCLK (bus) frequency, the
PLL configuration signals set the internal CPU and VCO frequency of operation. The PLL configuration
for the MPC7455 is shown in Table 17 for a set of example frequencies. In this example, shaded cells
represent settings that, for a given SYSCLK frequency, result in core and/or VCO frequencies that do not
comply with the 1-GHz column in Table 8. Note that these configurations were different in devices prior to
Rev F; see Section 1.11.2, “Part Numbers Not Fully Addressed by This Document,” for more information
regarding documentation of prior revisions.
Table 17. MPC7455 Microprocessor PLL Configuration Example for 1.0 GHz Parts
PLL_
CFG[0:4]
Example Bus-to-Core Frequency in MHz (VCO Frequency in MHz)
Bus-to-
Core
Multiplier
Core-to-
VCO
Multiplier
Bus (SYSCLK) Frequency
33.3
MHz
50
MHz
66.6
MHz
75
MHz
83
MHz
100
MHz
133
MHz
01000
2x
10000
3x
2x
10100
4x
2x
532
(1064)
10110
5x
2x
500
(1000)
667
(1333)
10010
5.5x
2x
550
(1100)
733
(1466)
11010
6x
2x
600
(1200)
800
(1600)
01010
6.5x
2x
540
(1080)
650
(1300)
866
(1730)
00100
7x
2x
525
(1050)
580
(1160)
700
(1400)
931
(1862)
00010
7.5x
2x
500
(1000)
563
(1125)
623
(1245)
750
(1500)
1000
(2000)
11000
8x
2x
533
(1066)
600
(1200)
664
(1328)
800
(1600)
01100
8.5x
2x
566
(1132)
638
(1276)
706
(1412)
850
(1700)
01111
9x
2x
600
(1200)
675
(1350)
747
(1494)
900
(1800)
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