參數(shù)資料
型號: MC68SZ328
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: i.MX Integrated Portable System Processor
中文描述: i.MX處理器集成的便攜式系統(tǒng)
文件頁數(shù): 9/96頁
文件大小: 1495K
代理商: MC68SZ328
Signals and Connections
MC9328MX1 Advance Information, Rev. 4
Freescale Semiconductor
9
PS
Control signal output for source driver (Sharp panel dedicated signal).
CLS
Start signal output for gate driver. This signal is invert version of PS (Sharp panel dedicated signal).
REV
Signal for common electrode driving signal preparation (Sharp panel dedicated signal).
SIM
SIM_CLK
SIM Clock
SIM_RST
SIM Reset
SIM_RX
Receive Data
SIM_TX
Transmit Data
SIM_PD
Presence Detect Schmitt trigger input
SIM_SVEN
SIM Vdd Enable
SPI
SPI1_MOSI
Master Out/Slave In
SPI1_MISO
Slave In/Master Out
SPI1_SS
Slave Select (Selectable polarity)
SPI1_SCLK
Serial Clock
SPI1_SPI_RDY
Serial Data Ready
SPI2_TXD
SPI2 Master TxData Output—This signal is multiplexed with a GPI/O pin however it does show up
as a primary or alternative signal in the signal multiplex scheme table. Refer to Chapter 16, “Serial
Peripheral Interface Modules (SPI 1 and SPI 2),” and Chapter 29, “GPIO Module and I/O Multiplexer
(IOMUX),” for information on how to bring this signal to the assigned pin.
SPI2_RXD
SPI2 master RxData input—This signal is multiplexed with a GPI/O pin however it does show up as
a primary or alternative signal in the signal multiplex scheme table. Refer to Chapter 16, “Serial
Peripheral Interface Modules (SPI 1 and SPI 2),” and Chapter 29, “GPIO Module and I/O Multiplexer
(IOMUX),” for information on how to bring this signal to the assigned pin.
SPI2_SS
SPI2 Slave Select—This signal is multiplexed with a GPI/O pin, however it does show up as a
primary or alternative signal in the signal multiplex scheme table. Refer to Chapter 16, “Serial
Peripheral Interface Modules (SPI 1 and SPI 2),” and Chapter 29, “GPIO Module and I/O Multiplexer
(IOMUX),” for information on how to bring this signal to the assigned pin.
SPI2_SCLK
SPI2 Serial Clock—This signal is multiplexed with a GPI/O pin however it does show up as a
primary or alternative signal in the signal multiplex scheme table. Refer to Chapter 16, “Serial
Peripheral Interface Modules (SPI 1 and SPI 2),” and Chapter 29, “GPIO Module and I/O Multiplexer
(IOMUX),” for information on how to bring this signal to the assigned pin.
Table 3. Signal Names and Descriptions (Continued)
Signal Name
Function/Notes
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