This document is a supplement to the MC68360 Quad Integrated Communications Controller User’s Manual (" />
參數(shù)資料
型號： MC68MH360VR25LR2
廠商： Freescale Semiconductor
文件頁數(shù)： 35/158頁
文件大小： 0K
描述： IC MPU QUICC 25MHZ 357-PBGA
標(biāo)準(zhǔn)包裝： 180
系列： M683xx
處理器類型： M683xx 32-位
速度： 25MHz
電壓： 5V
安裝類型： 表面貼裝
封裝/外殼： 357-BBGA
供應(yīng)商設(shè)備封裝： 357-PBGA（25x25）
包裝： 帶卷 (TR)
AboutThis Book
About This Book
This document is a supplement to the MC68360 Quad Integrated Communications
Controller User’s Manual (MC68360UM/AD) and the MPC860 PowerQUICC User’s
Manual
(MPC860UM/AD).
It
replaces
the
MC68MH360
Reference
Manual
(MC68MH360RM/AD).
To locate any published errata or updates for this document, refer to the website at
http://www.mot.com/netcomm.
Audience
This manual is intended for system software and hardware developers. It is assumed that
the reader understands basic concepts of time-division-multiplexed processors and how the
MPC860 CPM operates.
Organization
Following is a summary and a brief description of the major sections of this manual:
Chapter 1, “Overview,” gives an introduction to the QMC (QUICC multichannel
controller) protocol including some example applications.
Chapter 2, “QMC Memory Organization,” describes the operation specic to the
QMC protocol.
Chapter 3, “QMC Commands,” discusses the transmit and receive commands.
Chapter 4, “QMC Exceptions,” describes QMC interrupt handling.
Chapter 5, “Buffer Descriptors,” describes the contents of the receive and transmit
buffer descriptors for the QMC protocol and discusses the placement of QMC and
non-QMC buffer descriptors in internal and external memory.
Chapter 6, “QMC Initialization,” discusses the essential steps to initialize QMC
after a hard reset.
Chapter 7, “Features Deleted in MC68MH360,” lists the features deleted from the
MH360.
Chapter 8, “Performance,” provides a performance table for common congurations
supported by the 860MH and/or MH360; covers general guidelines and examples
for determining the serial bit rate and CPM loading on a given system; and discusses
system bus utilization and arbitration.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料
PDF描述
MC68MH360VR25L IC MPU QUICC 25MHZ 357-PBGA
MC68MH360CVR25L IC MPU QUICC 25MHZ 357-PBGA
HMC40DTEI CONN EDGECARD 80POS .100 EYELET
FMC50DRAS-S734 CONN EDGECARD 100PS .100 R/A SLD
EMC40DTEF CONN EDGECARD 80POS .100 EYELET
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68MH360VR25VL 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360VR33L 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360VR33LR2 功能描述:微處理器 - MPU QUICC 2SMC 1SPI RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MC68MH360ZP25L 功能描述:IC MPU 32BIT QUICC 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應(yīng)商設(shè)備封裝:357-PBGA（25x25） 包裝:托盤
MC68MH360ZP25LR2 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤
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