- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67966 > MC68HSC05C9AFN (MOTOROLA INC) 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HSC05C9AFN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 157/162頁 |
| 文件大小： | 1093K |
| 代理商： | MC68HSC05C9AFN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁當(dāng)前第157頁第158頁第159頁第160頁第161頁第162頁
N
O
N-D
I
SC
L
O
SU
R
E
AG
R
EEMENT
R
E
Q
U
IR
ED
Serial Peripheral Interface (SPI)
Advance Information
MC68HC05C9A — Rev. 5.0
94
Serial Peripheral Interface (SPI)
MOTOROLA
10.4.3 Serial Clock (SCK)
The master clock is used to synchronize data movement both in and out
of the device through its MOSI and MISO lines. The master and slave
devices are capable of exchanging a byte of information during a
sequence of eight clock cycles. Since SCK is generated by the master
device, this line becomes an input on a slave device.
As shown in Figure 10-1, four possible timing relationships may be
chosen by using control bits CPOL and CPHA in the serial peripheral
control register (SPCR). Both master and slave devices must operate
with the same timing. The master device always places data on the
MOSI line a half cycle before the clock edge (SCK), in order for the slave
device to latch the data.
Two bits (SPR0 and SPR1) in the SPCR of the master device select the
clock rate. In a slave device, SPR0 and SPR1 have no effect on the
operation of the SPI.
10.4.4 Slave Select (SS)
The slave select (SS) input line is used to select a slave device. It has to
be low prior to data transactions and must stay low for the duration of the
transaction.The SS line on the master must be tied high. In master
mode, if the SS pin is pulled low during a transmission, a mode fault error
flag (MODF) is set in the SPSR. In master mode the SS pin can be
selected as a general-purpose output by writing a 1 in bit 5 of the port D
data direction register, thus disabling the mode fault circuit.
When CPHA = 0, the shift clock is the OR of SS with SCK. In this clock
phase mode, SS must go high between successive characters in an SPI
message. When CPHA = 1, SS may be left low for several SPI
characters. In cases where there is only one SPI slave MCU, its SS line
could be tied to VSS as long as CPHA = 1 clock modes are used.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05E0 | 8-BIT, 4 MHz, MICROCONTROLLER, PQCC68 |
| MC68HC05F2FB | 8-BIT, MROM, MICROCONTROLLER, PQFP44 |
| MC68HC05F2B | 8-BIT, MROM, MICROCONTROLLER, PDIP42 |
| MC68HC705F6FU | 8-BIT, OTPROM, MICROCONTROLLER, PQFP64 |
| MC68HC05F6B | 8-BIT, MROM, MICROCONTROLLER, PDIP42 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HSC705C8ACFB | 制造商:Rochester Electronics LLC 功能描述:8 BIT MCU, 304 BYTES RAM - Bulk |
| MC68HSC705C8ACP | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HSC705C8ACS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HSC705J1ACDW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HSC705J1ACP | 制造商:Rochester Electronics LLC 功能描述:8 BIT MCU, 64 BYTES RAM - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。