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參數(shù)資料
| 型號(hào)： | MC68HSC05C9ACP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁(yè)數(shù)： | 78/162頁(yè) |
| 文件大小： | 1093K |
| 代理商： | MC68HSC05C9ACP |
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General Description
Advance Information
MC68HC05C9A — Rev. 5.0
22
General Description
MOTOROLA
1.5 Software-Programmable Options
The option register (OR), shown in Figure 1-2, contains the
programmable bits for these options:
Map two different areas of memory between RAM and ROM, one
of 48 bytes and one of 128 bytes
Edge-triggered only or edge- and level-triggered external interrupt
(IRQ pin and any port B pin configured for interrupt)
This register must be written to by user software during operation of the
microcontroller.
RAM0 — Random-Access Memory Control Bit 0
This read/write bit selects between RAM or ROM in location $0020 to
$004F. This bit can be read or written at any time.
1 = RAM selected
0 = ROM selected
RAM1— Random-Access Memory Control Bit 1
This read/write bit selects between RAM or ROM in location $0100 to
$017F. This bit can be read or written at any time.
1 = RAM selected
0 = EPROM selected
IRQ — Interrupt Request Bit
This bit selects between an edge-triggered only or edge- and level-
triggered external interrupt. This bit is set by reset, but can be cleared
by software. This bit can be written only once.
1 = Edge and level interrupt option selected
0 = Edge-only interrupt option selected
Address:
$3FDF
Bit 7
6
54321
Bit 0
Read:
RAM0
RAM1
0000
IRQ
0
Write:
Reset:
00
000010
= Unimplemented
Figure 1-2. Option Register
相關(guān)PDF資料 |
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| MC68HC05C9AMP | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40 |
| MC68HC05C9AMFN | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44 |
| MC68HC05C9AFB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44 |
| MC68HC05C9AMB | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42 |
| MC68HSC05C9AFN | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQCC44 |
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