參數(shù)資料
型號： MC68HC705JB4DWR2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 50/134頁
文件大小： 1305K
代理商： MC68HC705JB4DWR2
GENERAL RELEASE SPECIFICATION
February 24, 1999
MOTOROLA
MEMORY
MC68HC05JB4
2-2
REV 2
2.1
I/O AND CONTROL REGISTERS
The I/O and Control Registers reside in locations $0000 to $003F. The bit assign-
ments for each register are shown in Figure 2-2, Figure 2-3, Figure 2-4, and
Figure 2-5. Reading from unused bits will return unknown states, and writing to
unused bits will be ignored.
2.2
RAM
The user RAM consists of 176 bytes (including the stack) at locations $0080 to
$012F. The stack begins at address $00FF and proceeds down to $00C0. Using
the stack area for data storage or temporary work locations requires care to pre-
vent it from being overwritten due to stacking from an interrupt or subroutine call.
2.3
ROM
There are a total of 4k bytes of ROM on chip. This includes 3584 bytes of user
ROM with locations $1000 to $1DFF for user program storage and 16 bytes for
user vectors at locations $1FF0 to $1FFF. Also, 496 bytes of Self-check ROM on
chip at locations $1E00 to $1FEF.
相關PDF資料
PDF描述
MC68HC05L11PU 8-BIT, MROM, 3.69 MHz, MICROCONTROLLER, PQFP100
MC68HC05P7P 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
MC68HC05SB7 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC705SB7 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
MC68HC05SU3AB 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP42
相關代理商/技術參數(shù)
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