參數(shù)資料
型號(hào)： MC68HC705JB2DW
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDSO20
封裝： SOIC-20
文件頁數(shù)： 121/128頁
文件大?。?/td> 2493K
代理商： MC68HC705JB2DW
GENERAL RELEASE SPECIFICATION
August 28, 1998
UNIVERSAL SERIAL BUS MODULE
MC68HC705JB2
10-24
REV 1.1
TP1SIZ3-TP1SIZ0 — Endpoint 1/Endpoint 2 Transmit Data Packet Size
These read/write bits store the number of transmit data bytes for the next IN
token request for Endpoint 1 or Endpoint 2. These bits are cleared by reset.
10.5.6 USB Control Register 2 (UCR2)
TX1STR — Clear Transmit First Flag
Writing a logic 1 to this write-only bit will clear the TX1ST bit if it is set. Writing a
logic 0 to the TX1STR has no effect. Reset clears this bit.
TX1ST — Transmit First Flag
This read-only bit is set if the Endpoint 0 Data Transmit Flag (TXD0F) is set
when the USB control logic is setting the Endpoint 0 Data Receive Flag
(RXD0F). That is, this bit will be set if an Endpoint 0 Transmit Flag is still set at
the end of an Endpoint 0 reception. This bit lets the rmware know that the
Endpoint 0 transmission happened before the Endpoint 0 reception. Reset
clears this bit.
1 =
IN transaction occurred before SETUP/OUT.
0 =
IN transaction occurred after SETUP/OUT.
ENABLE2 — Endpoint 2 Enable
This read/write bit enables Endpoint 2 and allows the USB to respond to IN
packets addressed to Endpoint 2. Reset clears this bit.
1 =
Endpoint 2 is enabled and can respond to an IN token.
0 =
Endpoint 2 is disabled
ENABLE1 — Endpoint 1 Enable
This read/write bit enables Endpoint 1 and allows the USB to respond to IN
packets addressed to Endpoint 1. Reset clears this bit.
1 =
Endpoint 1 is enabled and can respond to an IN token.
0 =
Endpoint 1 is disabled
STALL2 — Endpoint 2 Force Stall Bit
This read/write bit causes Endpoint 2 to return a STALL handshake when
polled by either an IN or OUT token by the USB Host Controller. Reset clears
this bit.
1 =
Send STALL handshake.
0 =
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
UCR2
R
0
TX1ST
0
ENABLE2 ENABLE1
STALL2
STALL1
$0037
W
TX1STR
reset
-
0
-
0000
= Unimplemented
Figure 10-25. USB Control Register 2 (UCR2)
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料
PDF描述
MC68HC705JB2P 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP20
MC68HC705JB4P 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28
MC68HC705K1CDW 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDSO16
MC68HC705K1CP 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP16
MC68HC705K1S 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, CDIP16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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