參數(shù)資料
型號(hào): MC68HC705J2S
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER, CDIP20
封裝: WINDOWED, CERDIP-20
文件頁(yè)數(shù): 15/82頁(yè)
文件大?。?/td> 2545K
代理商: MC68HC705J2S
PARALLEL I/O
3-4
Rev. 2
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3.3 Port B
Port B is a 6-bit general-purpose bidirectional I/O port. The contents of DDRB
determine whether each pin is an input or an output. Figure 3-4 and Figure 3-5
show the port B data register and DDRB.
Figure 3-4. Port B Data Register
PB5–PB0 — Port B Data Bits
These read/write bits are software-programmable. Data direction of each bit is
under the control of the corresponding DDRA bit.
Figure 3-5. Port B Data Direction Register
DDRB7–DDRB0 — Port B Data Direction Bits
These read/write bits control port B data direction.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
PORTB — Port B Data Register
$0001
Bit 7
6
5
4
3
2
1
Bit 0
0
PB5
PB4
PB3
PB2
PB1
PB0
RESET:
NOT CHANGED BY RESET
DDRB — Port B Data Direction Register
$0005
Bit 7
6
5
4
3
2
1
Bit 0
DDRB7
DDRB6
DDRB5
DDRB4
DDRB3
DDRB2
DDRB1
DDRB0
RESET:
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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