參數(shù)資料
型號: MC68HC705G1B
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56
封裝: SDIP-56
文件頁數(shù): 9/124頁
文件大?。?/td> 732K
代理商: MC68HC705G1B
MOTOROLA
12-2
MC68HC05G1
OPERATING MODES
12
12.1
User Mode (Normal Operation)
The normal operational mode of the MC68HC05G1/
MC68HC705G1 is the user mode. The user
mode will be entered if the RESET line is brought low, and the IRQ pin is within its normal
operational range (VSS to VDD), the rising edge of the RESET will cause the MCU to enter the user
mode.
12.2
Self-Check Mode
The MC68HC05G1 self-check mode is for the user to check device functions with an on-chip
self-check program masked at location $3E00 to $3FDF under minimum hardware support. The
hardware is shown in Figure 12-3. Figure 12-2 is the criteria to enter self-check mode, where
PB1’s condition is latched within rst two clock cycles after the rising edge of the reset. PB1 can
then be used for other purposes. After entering the self-check mode, CPU branches to the
self-check program and carries out the self-check. Self-check is a repetitive test, i.e. if all parts are
checked to be good, the CPU will repeat the self-check again. Therefore, the LEDs attached to
Port A will be ashing if the device is good; else the combination of LEDs’ on-off pattern can show
what part of the device is suspected to be bad. Table 12-2 lists the LEDs’ on-off patterns and their
corresponding indications.
Table 12-1 Mode Selection
RESET
IRQ
PB1
MODE
VSS to VDD
USER
+9V Rising Edge*
VDD
SELF-CHECK/
BOOTSTRAP
* Minimum hold time should be 2 clock cycles, after that it can be used as a normal IRQ
function pin.
Figure 12-2 Self-Check Mode Timing
5V
9V
PB1
IRQ
RESET
+5V
+9V
TPG
102
相關(guān)PDF資料
PDF描述
MC68HC705G1FU 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP64
MC68HC05G1B 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC705JB2DW 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDSO20
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC705J1A 制造商:Freescale Semiconductor 功能描述:
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