參數(shù)資料
型號： MC68HC705E5P
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 140/148頁
文件大?。?/td> 3554K
代理商： MC68HC705E5P
Motorola Bus (M Bus) Interface
Programming Considerations
MC68HC705E5 — Rev. 1.0
General Release Specification
Motorola Bus (M Bus) Interface
NON-DISCLOSURE
AGREEMENT
REQUIRED
11.8.4 Generation of the Stop Signal
A data transfer ends with a stop signal generated by the master device.
A master transmitter can simply generate a stop signal after all the data
has been transmitted.
The following is an example showing how a stop condition is generated
by a master transmitter.
MASTX
BRSET
0,MSR,END
; IF NO ACK, BRANCH TO END
LDA
TXCNT
; GET VALUE FROM THE
; TRANSMITTING COUNTER
BEQ
END
; IF NO MORE DATA, BRANCH TO
; END
LDA
DATABUF
; GET NEXT BYTE OF DATA
STA
MDR
; TRANSMIT THE DATA
DEC
TXCNT
; DECREASE THE TXCNT
BRA
EMASTX
; EXIT
END
BCLR
5,MCR
; GENERATE A STOP CONDITION
EMASTX
RTI
; RETURN FROM INTERRUPT
If a master receiver wants to terminate a data transfer, it must inform the
slave transmitter by not acknowledging the last byte of data. This can be
done by setting the transmit acknowledge bit (TXAK) before reading the
second to the last byte of data. Before reading the last byte of data, a
stop signal must be generated first.
The following is an example showing how a stop signal is generated by
a master receiver.
MASR
DEC
RXCNT
BEQ
ENMASR
; LAST BYTE TO BE READ
LDA
RXCNT
DECA
; CHECK LAST 2ND BYTE TO BE READ
BNE
NXMAR
; NOT LAST ONE OR LAST SECOND
LAMAR
BSET
3,MCR
; LAST SECOND, DISABLE ACK
; TRANSMITTING
BRA
NXMAR
ENMASR
BCLR
5,MCR
; LAST ONE, GENERATE 'STOP'
; SIGNAL
NXMAR
LDA
MDR
; READ DATA AND STORE
STA
RXBUF
RTI
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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