參數(shù)資料
型號： MC68HC705E5P
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝： PLASTIC, DIP-28
文件頁數(shù)： 121/148頁
文件大小： 3554K
代理商： MC68HC705E5P
NON-DISCLOSURE
AGREEMENT
REQUIRED
Motorola Bus (M Bus) Interface
General Release Specification
MC68HC705E5 — Rev. 1.0
Motorola Bus (M Bus) Interface
11.5.1 Start Signal
When the bus is free (for example, no master device is engaging the bus
and both SCL and SDA lines are at logical high), a master may initiate
communication by sending a start signal. As shown in Figure 11-1, a
start signal is defined as a high-to-low transition of SDA while SCL is
high. This signal denotes the beginning of new data transfer (each data
transfer may contain several bytes of data) and wakes up all slaves.
Figure 11-1. M-Bus Transmission Signal Diagram
10
0
101
01
0
10
11
1
00
NO ACKNOWLEDGE
MSB
LSB
SDA
SCL
START SIGNAL
STOP SIGNAL
LSB
ACKNOWLEDGE BIT
10
0
101
01
0
10
11
1
00
NO ACKNOWLEDGE
MSB
LSB
SDA
SCL
START SIGNAL
STOP SIGNAL
LSB
ACKNOWLEDGE BIT
REPEATED START SIGNAL
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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