參數(shù)資料
型號: MC68HC705C9AFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, QFP-44
文件頁數(shù): 99/177頁
文件大?。?/td> 1941K
代理商: MC68HC705C9AFB
General Description
Advance Information
MC68HC705C9A — Rev. 4.0
28
General Description
MOTOROLA
STOPDIS — STOP Instruction Disable Bit
This read-only bit allows emulation of the “STOP disable” mask option
on the MC68HC05C12A. (See 5.10 COP During Stop Mode.) If
configured in MC68HC05C9A mode, this bit has no effect and will be
forced to 0 regardless of the programmed state.
1 = If the MCU enters stop mode, the clock monitor is enabled to
force a system reset
0 = STOP instruction executed as normal
C12COPE — C12A COP Enable Bit
This read-only bit enables the COP function when configured in
MC68HC05C12A mode. If configured in MC68HC05C9A mode, this
bit has no effect and will be forced to 0 regardless of the programmed
state.
1 = When in C12A mode, this enables the C12ACOP watchdog
timer.
0 = When in C12A mode, this disables the C12ACOP watchdog
timer.
SEC — Security Enable Bit
This read-only bit enables the EPROM security feature. Once
programmed, this bit helps to prevent external access to the
programmed EPROM data. The EPROM data cannot be verified or
modified.
1 = Security enabled
0 = Security disabled
NOTE:
During power-on reset, the device always will be configured as
MC68HC05C9A regardless of the state of the C12A bit.
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