參數(shù)資料
型號(hào)： MC68HC705C9AFB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝： 10 X 10 MM, QFP-44
文件頁數(shù)： 45/177頁
文件大?。?/td> 1941K
代理商： MC68HC705C9AFB
Electrical Specifications
3.3-Vdc Control Timing
MC68HC705C9A — Rev. 4.0
Advance Information
MOTOROLA
Electrical Specifications
139
12.9 3.3-Vdc Control Timing
Figure 12-4. TCAP Timing Relationships
Characteristic(1)
1.
V
DD = 3.3Vdc ± 0.3 Vdc, VSS = 0 Vdc, TA = –40 to +85°C, unless otherwise noted
Symbol
Min
Max
Unit
Frequency of operation
Crystal
External clock
fOSC
—
DC
2.0
MHz
Internal operating frequency (fOSC ÷ 2)
Crystal
External clock
fOP
—
DC
1.0
MHz
Cycle time
tCYC
1000
—
ns
Crystal oscillator startup time
tOXOV
—
100
ms
Stop recovery startup time (crystal oscillator)
tILCH
—
100
ms
RESET pulse width
tRL
1.5
—
tCYC
Timer
Resolution(2)
Input capture pulse width
Input capture pulse period
2.
Because a 2-bit prescaler in the timer must count four internal cycles (t
CYC), this is the limiting minimum factor
in determining the timer resolution.
tRESL
tTH, tTL
tTLTL
4.0
125
(3)
3.
The minimum period t
TLTL should not be less than the number of cycle times it takes to execute the capture
interrupt service routine plus 24 t
CYC.
—
tCYC
ns
tCYC
Interrupt pulse width low (edge-triggered)
tILIH
250
—
ns
Interrupt pulse period
tILIL
(4)
4.
The minimum t
ILIL should not be less than the number of cycle times it takes to execute the interrupt service
routine plus 19 t
CYC.
—
tCYC
OSC1 pulse width
tOH,tOL
200
—
ns
t
TLTL
*
TCAP PIN
t
TH
*
t
TL
*
* Refer to timer resolution data in 12.8 5.0-Vdc Control Timing and 12.9 3.3-Vdc Control Timing.
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