參數(shù)資料
型號: MC68HC705C9AFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, QFP-44
文件頁數(shù): 137/177頁
文件大?。?/td> 1941K
代理商: MC68HC705C9AFB
Resets
Advance Information
MC68HC705C9A — Rev. 4.0
62
Resets
MOTOROLA
5.6.2 C9A COP Control Register
The COP control register, shown in Figure 5-5, performs these
functions:
Enables clock monitor function
Enables MC68HC05C9A compatible COP function
Selects timeout duration of COP timer
and flags the following conditions:
A COP timeout
Clock monitor reset
COPF — Computer Operating Properly Flag
Reading the COP control register clears COPF.
1 = COP or clock monitor reset has occurred.
0 = No COP or clock monitor reset has occurred.
CME — Clock Monitor Enable Bit
This bit is readable any time, but may be written only once.
1 = Clock monitor enabled
0 = Clock monitor disabled
COPE — COP Enable Bit
This bit is readable any time. COPE, CM1, and CM0 together may be
written with a single write, only once, after reset. This bit is cleared by
reset.
1 = COP enabled
0 = COP disabled
$001E
Bit 7
6
54321
Bit 0
Read:
0
COPF
CME
COPE
CM1
CM0
Write:
Reset:
00
0
U
0000
= Unimplemented
U = Undetermined
Figure 5-5. COP Control Register (COPCR)
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