參數(shù)資料
型號(hào)： MC68HC705C9ACFNE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 70/118頁
文件大?。?/td> 750K
代理商： MC68HC705C9ACFNE
Timer I/O Registers
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
55
8.3.3 Timer Registers
The timer registers (TRH and TRL), shown in Figure 8-4, contains the current high and low bytes of the
16-bit counter. Reading TRH before reading TRL causes TRL to be latched until TRL is read. Reading
TRL after reading the timer status register clears the timer overflow flag (TOF). Writing to the timer
registers has no effect.
Figure 8-4. Timer Registers (TRH and TRL)
8.3.4 Alternate Timer Registers
The alternate timer registers (ATRH and ATRL), shown in Figure 8-5, contain the current high and low
bytes of the 16-bit counter. Reading ATRH before reading ATRL causes ATRL to be latched until ATRL
is read. Reading ATRL has no effect on the timer overflow flag (TOF). Writing to the alternate timer
registers has no effect.
Figure 8-5. Alternate Timer Registers (ATRH and ATRL)
NOTE
To prevent interrupts from occurring between readings of ATRH and ATRL,
set the interrupt flag in the condition code register before reading ATRH,
and clear the flag after reading ATRL.
TRH
$0018
Bit 7
654321
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write
Reset:
11111111
TRL
$0019
Bit 7
654321
Bit 0
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2
Bit 1Bit 0
Write:
Reset:
11111100
= Unimplemented
ATRH
$001A
Bit 7
654321
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
11111111
ATRL
$001B
Bit 7
654321
Bit 0
Read:
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2
Bit 1Bit 0
Write:
Reset:
11111100
= Unimplemented
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