MC68HC11PH8
MOTOROLA
i
TABLE OF CONTENTS
Paragraph
Number
Page
Number
Title
TABLE OF CONTENTS
1
INTRODUCTION
1.1
Features.................................................................................................................1-1
1.2
Mask options .........................................................................................................1-2
2
PIN DESCRIPTIONS
2.1
VDD and VSS ........................................................................................................2-2
2.2
RESET...................................................................................................................2-3
2.3
Crystal driver and external clock input (XTAL, EXTAL)..........................................2-3
2.4
E clock output (E) ..................................................................................................2-5
2.5
Phase-locked loop (XFC, VDDSYN, 4XOUT) ........................................................2-6
2.5.1
PLL operation...................................................................................................2-7
2.5.2
Synchronization of PLL with subsystems.........................................................2-8
2.5.3
Changing the PLL frequency ...........................................................................2-8
2.5.4
PLL registers....................................................................................................2-8
2.5.4.1
PLLCR — PLL control register ...................................................................2-9
2.5.4.2
SYNR — Synthesizer program register......................................................2-11
2.6
Interrupt request (IRQ) ..........................................................................................2-12
2.7
Nonmaskable interrupt (XIRQ/
VPPE)....................................................................2-12
2.8
MODA and MODB (MODA/LIR and MODB/VSTBY) .............................................2-13
2.9
VRH and VRL ........................................................................................................2-13
2.10
PG7/R/W ...............................................................................................................2-13
2.11
Port signals ............................................................................................................2-14
2.11.1
Port A ...............................................................................................................2-14
2.11.2
Port B ...............................................................................................................2-14
2.11.3
Port C ...............................................................................................................2-16
2.11.4
Port D ...............................................................................................................2-16
2.11.5
Port E ...............................................................................................................2-17
Port F ...............................................................................................................2-17
2.11.7
Port G...............................................................................................................2-17
2.11.8
Port H ...............................................................................................................2-18
2.12
LCD module...........................................................................................................2-18
2.12.1
LCDR — LCD control and data register...........................................................2-18
TPG
7