MC68HC11PH8
MOTOROLA
v
TABLE OF CONTENTS
Paragraph
Number
Page
Number
Title
7.5
SPI registers ..........................................................................................................7-5
7.5.1
SPCR — SPI control register...........................................................................7-6
7.5.2
SPSR — SPI status register ............................................................................7-7
7.5.3
SPDR — SPI data register...............................................................................7-8
7.5.4
OPT2 — System conguration options register 2 ............................................7-9
7.6
SPI2 .......................................................................................................................7-10
7.6.1
SP2CR — SPI2 control register.......................................................................7-11
7.6.2
SP2SR — SPI2 status register ........................................................................7-11
7.6.3
SP2DR — SPI2 data register...........................................................................7-11
7.6.4
SP2OPT — SPI2 control options register ........................................................7-11
8
TIMING SYSTEM
8.1
16-bit timer.............................................................................................................8-1
8.1.1
Timer enable control ........................................................................................8-3
8.1.1.1
PLLCR — PLL control register ...................................................................8-3
8.1.2
Timer structure.................................................................................................8-4
8.1.3
Input capture ....................................................................................................8-8
8.1.3.1
TCTL2 — Timer control register 2 ..............................................................8-9
8.1.3.2
TIC1–TIC3 — Timer input capture registers...............................................8-10
8.1.3.3
TI4/O5 — Timer input capture 4/output compare 5 register .......................8-10
8.1.4
Output compare ...............................................................................................8-11
8.1.4.1
TOC1–TOC4 — Timer output compare registers .......................................8-12
8.1.4.2
CFORC — Timer compare force register ...................................................8-12
8.1.4.3
OC1M — Output compare 1 mask register ................................................8-13
8.1.4.4
OC1D — Output compare 1 data register ..................................................8-13
8.1.4.5
TCNT — Timer counter register .................................................................8-14
8.1.4.6
TCTL1 — Timer control register 1 ..............................................................8-14
8.1.4.7
TMSK1 — Timer interrupt mask register 1 .................................................8-15
8.1.4.8
TFLG1 — Timer interrupt ag register 1 ....................................................8-16
8.1.4.9
TMSK2 — Timer interrupt mask register 2 .................................................8-17
8.1.4.10
TFLG2 — Timer interrupt ag register 2 ....................................................8-18
8.1.5
Real-time interrupt ...........................................................................................8-19
8.1.5.1
TMSK2 — Timer interrupt mask register 2 .................................................8-20
8.1.5.2
TFLG2 — Timer interrupt ag register 2 ....................................................8-21
8.1.5.3
PACTL — Pulse accumulator control register ............................................8-22
8.1.6
Computer operating properly watchdog function .............................................8-23
8.1.7
LCD module .....................................................................................................8-23
8.1.8
Pulse accumulator ...........................................................................................8-23
8.1.8.1
PACTL — Pulse accumulator control register ............................................8-25
8.1.8.2
PACNT — Pulse accumulator count register..............................................8-26
8.1.8.3
Pulse accumulator status and interrupt bits ...............................................8-26
8.1.8.4
TMSK2 — Timer interrupt mask 2 register .................................................8-26
8.1.8.5
TFLG2 — Timer interrupt ag 2 register ....................................................8-26
TPG
11