
MC68HC11P2
MOTOROLA
8-1
TIMING SYSTEM
8
TIMING SYSTEM
The M68HC11 timing system is composed of ve clock divider chains. The main clock divider
chain includes a 16-bit free-running counter, which is driven by a programmable prescaler. The
main timer’s programmable prescaler provides one of the four clocking rates to drive the 16-bit
counter. Two prescaler control bits select the prescale rate.
The prescaler output divides the system clock by 1, 4, 8, or 16. Taps from this main clocking chain
drive circuitry generate the slower clocks used by the pulse accumulator, the real-time interrupt
(RTI), and the computer operating properly (COP) watchdog subsystems, which are also
All main timer system activities are referenced to this free-running counter. The counter begins
incrementing from $0000 as the MCU comes out of reset, and continues to the maximum count,
$FFFF. At the maximum count, the counter rolls over to $0000, sets an overow ag and continues
to increment. As long as the MCU is running in a normal operating mode, there is no way to reset,
change or interrupt the counting. The capture/compare subsystem features three input capture
channels, four output compare channels and one channel that can be selected to perform either
input capture or output compare. Each of the three input capture functions has its own 16-bit input
capture register (time capture latch) and each of the output compare functions has its own 16-bit
compare register. All timer functions, including the timer overow and RTI, have their own interrupt
controls and separate interrupt vectors.
The pulse accumulator contains an 8-bit counter and edge select logic. The pulse accumulator
can operate in either event counting mode or gated time accumulation mode. During event
counting mode, the pulse accumulator’s 8-bit counter increments when a specied edge is
detected on an input signal. During gated time accumulation mode, an internal clock source
increments the 8-bit counter while an input signal has a predetermined logic level.
The real-time interrupt (RTI) is a programmable periodic interrupt circuit that permits pacing the
execution of software routines by selecting one of four interrupt rates.
The COP watchdog clock input (E/215) is tapped off from the free-running counter chain. The COP
automatically times out unless it is serviced within a specic time by a program reset sequence. If
the COP is allowed to time out, a reset is generated, which drives the RESET pin low to reset the
MCU and the external system. Refer to
Table 8-1 for crystal related frequencies and periods.