參數(shù)資料
型號(hào)： MC68HC11F1CFN5
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, 5 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 91/163頁
文件大小： 711K
代理商： MC68HC11F1CFN5
MC68HC11F1
CENTRAL PROCESSING UNIT
MOTOROLA
TECHNICAL DATA
3-9
Table 3-2 Instruction Set (Sheet 1 of 6)
Mnemonic
Operation
Description
Addressing
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S
X
H
I
N
Z
V
C
ABA
Add
Accumulators
A + B
A
INH
1B
—
2
—
—
ABX
Add B to X
IX + (00 : B)
IX
INH
3A
—
3
————————
ABY
Add B to Y
IY + (00 : B)
IY
INH
18
3A
—
4
————————
ADCA (opr)
Add with Carry
to A
A + M + C
A
A
IMM
A
DIR
A
EXT
A
IND,X
A
IND,Y
89
99
B9
A9
18
A9
ii
dd
hh ll
ff
2
3
4
5
——
—
ADCB (opr)
Add with Carry
to B
B + M + C
B
B
IMM
B
DIR
B
EXT
B
IND,X
B
IND,Y
C9
D9
F9
E9
18
E9
ii
dd
hh ll
ff
2
3
4
5
——
—
ADDA (opr)
Add Memory
to A
A + M
A
A
IMM
A
DIR
A
EXT
A
IND,X
A
IND,Y
8B
9B
BB
AB
18
AB
ii
dd
hh ll
ff
2
3
4
5
——
—
ADDB (opr)
Add Memory
to B
B + M
B
B
IMM
B
DIR
B
EXT
B
IND,X
B
IND,Y
CB
DB
FB
EB
18
EB
ii
dd
hh ll
ff
2
3
4
5
——
—
ADDD (opr)
Add 16-Bit to D D + (M : M + 1)
D
IMM
DIR
EXT
IND,X
IND,Y
C3
D3
F3
E3
18
E3
jj kk
dd
hh ll
ff
4
5
6
7
————
ANDA (opr)
AND A with
Memory
A M
A
A
IMM
A
DIR
A
EXT
A
IND,X
A
IND,Y
84
94
B4
A4
18
A4
ii
dd
hh ll
ff
2
3
4
5
————
0—
ANDB (opr)
AND B with
Memory
B M
B
B
IMM
B
DIR
B
EXT
B
IND,X
B
IND,Y
C4
D4
F4
E4
18
E4
ii
dd
hh ll
ff
2
3
4
5
————
0—
ASL (opr)
Arithmetic
Shift Left
EXT
IND,X
IND,Y
78
68
18
68
hh ll
ff
6
7
————
ASLA
Arithmetic
Shift Left A
A
INH
48
—
2
————
ASLB
Arithmetic
Shift Left B
B
INH
58
—
2
————
ASLD
Arithmetic
Shift Left D
INH
05
—
3
————
ASR
Arithmetic
Shift Right
EXT
IND,X
IND,Y
77
67
18
67
hh ll
ff
6
7
————
ASRA
Arithmetic
Shift Right A
A
INH
47
—
2
————
ASRB
Arithmetic
Shift Right B
B
INH
57
—
2
————
BCC (rel)
Branch if Carry
Clear
? C = 0
REL
24
rr
3
————————
BCLR (opr)
(msk)
Clear Bit(s)
M (mm)
M
DIR
IND,X
IND,Y
15
1D
18
1D
dd mm
ff mm
6
7
8
————
0—
BCS (rel)
Branch if Carry
Set
? C = 1
REL
25
rr
3
————————
BEQ (rel)
Branch if =
Zero
? Z = 1
REL
27
rr
3
————————
BGE (rel)
Branch if
Zero
? N
⊕ V = 0
REL
2C
rr
3
————————
C
0
b7
b0
C
0
b7
b0
C
0
b7
b0
C
0
b7
b0
A
B
b7
b0
C
b7
b0
C
b7
b0
C
b7
b0
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