參數(shù)資料
型號: MC68HC11F1CFN3R2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 122/174頁
文件大?。?/td> 981K
代理商: MC68HC11F1CFN3R2
MC68HC11F1
OPERATING MODES AND ON-CHIP MEMORY
MOTOROLA
TECHNICAL DATA
4-13
GWOM — Port G Wired-OR Mode
0 = Port G operates normally.
1 = Port G outputs are open-drain type.
CWOM — Port C Wired-OR Mode
0 = Port C operates normally.
1 = Port C outputs are open-drain type.
CLK4X — 4XOUT Clock Enable
The 4XOUT signal, when enabled, is a buffered XTAL signal and is four times the fre-
quency of the E-clock. This buffered clock is intended to synchronize external devices
with the MCU. Refer to SECTION 2 PIN DESCRIPTIONS.
0 = The 4XOUT pin is driven low.
1 = The 4XOUT signal is driven on the 4XOUT pin.
Bits [4:0] — Not implemented
Always read zero
4.3.2.5 Block Protect Register (BPROT)
BPROT prevents accidental writes to EEPROM and the CONFIG register. The bits in
this register can be written to zero during the first 64 E-clock cycles after reset in the
normal modes. Once the bits are cleared to zero, the EEPROM array and the CONFIG
register can be programmed or erased. Setting the bits in the BPROT register to logic
one protects the EEPROM and CONFIG register until the next reset. Refer to Table
Bits [7:5] — Not implemented
Always read zero
PTCON — Protect for CONFIG
0 = CONFIG register can be programmed or erased normally
1 = CONFIG register cannot be programmed or erased
BPRT[3:0] — Block Protect Bits for EEPROM
0 = Protection disabled for associated block
1 = Protection enabled for associated block
OPT2 — System Configuration Options 2
$1038
Bit 7
654321
Bit 0
GWOM
CWOM
CLK4X
————
RESET:
0000000
0
BPROT — Block Protect
$1035
Bit 7
654321
Bit 0
PTCON
BPRT3
BPRT2
BPRT1
BPRT0
RESET:
0001111
1
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