參數(shù)資料
型號： MC68HC11F1CFN3R2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 119/174頁
文件大?。?/td> 981K
代理商： MC68HC11F1CFN3R2
MC68HC11F1
OPERATING MODES AND ON-CHIP MEMORY
MOTOROLA
TECHNICAL DATA
4-11
RAM[3:0] — RAM Map Position
These four bits, which specify the upper hexadecimal digit of the RAM address, control
position of RAM in the memory map. RAM can be positioned at the beginning of any
4-Kbyte page in the memory map. Refer to Table 4-5.
REG[3:0] — 128-Byte Register Block Position
These four bits specify the upper hexadecimal digit of the address for the 128-byte
block of internal registers. The register block is positioned at the beginning of any 4-
Kbyte page in the memory map. Refer to Table 4-5.
When the memory map has the 96-byte register block mapped at the same location
as RAM, the registers have priority and the lower 96 bytes of RAM are inaccessible.
No harmful conicts occur due to a hardware resource priority scheme. On-chip reg-
isters have the highest priority of all on-chip resources, followed by on-chip RAM, boot-
strap ROM, and on-chip EEPROM.
4.3.2.3 OPTION Register
The 8-bit special-purpose OPTION register sets internal system configuration options
during initialization. In single-chip and expanded modes (SMOD = 0), IRQE, DLY, FC-
ME, and CR[1:0] can be written only once and only in the first 64 cycles after a reset.
This minimizes the possibility of any accidental changes to the system configuration.
In special test and bootstrap modes (SMOD = 1), these bits can be written at any time.
*Can be written only once in first 64 cycles out of reset in normal modes or at any time in special modes.
Table 4-5 RAM and Register Mapping
RAM[3:0]
Location
REG[3:0]
Location
0000
$0000–$03FF
0000
$0000–$005F
0001
$1000–$13FF
0001
$1000–$105F
0010
$2000–$23FF
0010
$2000–$205F
0011
$3000–$33FF
0011
$3000–$305F
0100
$4000–$43FF
0100
$4000–$405F
0101
$5000–$53FF
0101
$5000–$505F
0110
$6000–$63FF
0110
$6000–$605F
0111
$7000–$73FF
0111
$7000–$705F
1000
$8000–$83FF
1000
$8000–$805F
1001
$9000–$93FF
1001
$9000–$905F
1010
$A000–$A3FF
1010
$A000–$A05F
1011
$B000–$B3FF
1011
$B000–$B05F
1100
$C000–$C3FF
1100
$C000–$C05F
1101
$D000–$D3FF
1101
$D000–$D05F
1110
$E000–$E3FF
1110
$E000–$E05F
1111
$F000–$F3FF
1111
$F000–$F05F
OPTION — System Configuration Options
$1039
Bit 7
654321
Bit 0
ADPU
CSEL
IRQE*
DLY*
CME
FCME*
CR1*
CR0*
RESET:
0000000
0
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