參數(shù)資料
型號： MC68HC11D0CFB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MICROCONTROLLER, PQFP44
封裝： 10 X 10 MM, QFP-44
文件頁數(shù)： 7/124頁
文件大?。?/td> 1481K
代理商： MC68HC11D0CFB
MOTOROLA
TIMING SYSTEM
MC68HC11D3
9-18
TECHNICAL DATA
9.6.3 Pulse Accumulator Status and Interrupt Bits
The pulse accumulator control bits, PAOVI and PAII, PAOVF, and PAIF are located
within timer registers TMSK2 and TFLG2.
PAOVI and PAOVF — Pulse Accumulator Interrupt Enable and Overflow Flag
The PAOVF status bit is set each time the pulse accumulator count rolls over from $FF
to $00. To clear this status bit, write a one in the corresponding data bit position (bit 5)
of the TFLG2 register. The PAOVI control bit allows configuring the pulse accumulator
overflow for polled or interrupt-driven operation and does not affect the state of
PAOVF. When PAOVI is zero, pulse accumulator overflow interrupts are inhibited, and
the system operates in a polled mode, which requires PAOVF to be polled by user soft-
ware to determine when an overflow has occurred. When the PAOVI control bit is set,
a hardware interrupt request is generated each time PAOVF is set. Before leaving the
interrupt service routine, software must clear PAOVF by writing to the TFLG2 register.
PAII and PAIF — Pulse Accumulator Input Edge Interrupt Enable and Flag
The PAIF status bit is automatically set each time a selected edge is detected at the
PA7/PAI/OC1 pin. To clear this status bit, write to the TFLG2 register with a one in the
corresponding data bit position (bit 4). The PAII control bit allows configuring the pulse
accumulator input edge detect for polled or interrupt-driven operation but does not af-
fect setting or clearing the PAIF bit. When PAII is zero, pulse accumulator input inter-
rupts are inhibited, and the system operates in a polled mode. In this mode, the PAIF
bit must be polled by user software to determine when an edge has occurred. When
the PAII control bit is set, a hardware interrupt request is generated each time PAIF is
set. Before leaving the interrupt service routine, software must clear PAIF by writing to
the TFLG register.
PACNT — Pulse Accumulator Count
$0027
Bit 7
654321
Bit 0
Bit 7
654321
Bit 0
TMSK2 — Timer Interrupt Mask 2
$0024
Bit 7
654321
Bit 0
TOI
RTII
PAOVI
PAII
0
PR1
PR0
RESET:
0000000
0
TFLG2 — Timer Interrupt Flag 2
$0025
Bit 7
654321
Bit 0
TOF
RTIF
PAOVF
PAIF
0
RESET:
0000000
0
相關(guān)PDF資料
PDF描述
MC68HC11D0CP2 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40
MC68HC11D0CP2 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDIP40
MC68HC11D0CP 8-BIT, MICROCONTROLLER, PDIP40
MC68HC11L6CFU1 8-BIT, OTPROM, 1 MHz, MICROCONTROLLER, PQFP64
MC68HC16S2CPU25 16-BIT, 25.17 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC11D0CFB2 制造商:Rochester Electronics LLC 功能描述:8BIT MCU,192 BYTES RAM - Bulk 制造商:Freescale Semiconductor 功能描述: 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
MC68HC11D0CFB3 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
MC68HC11D0CFB3R2 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC68HC11D0CFBE2 功能描述:8位微控制器 -MCU 8B MCU 192 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
MC68HC11D0CFBE3 功能描述:8位微控制器 -MCU 8B MCU 192RAM 3 MHZ RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*