msCAN08 Controller (msCAN08)
MC68HC08AZ32
352
msCAN08 Controller (msCAN08)
MOTOROLA
At least three transmit buffers are required to meet the first of above
requirements under all circumstances. The msCAN08 has three transmit
buffers.
The second requirement calls for some sort of internal prioritization
which the msCAN08 implements with the ‘local priority’ concept
described below.
Receive structures
The received messages are stored in a two stage input FIFO. The two
message buffers are mapped using a ‘ping pong’ arrangement into a
single memory area (see
Figure 2
). While the background receive buffer
(RxBG) is exclusively associated to the msCAN08, the foreground
receive buffer (RxFG) is addressable by the CPU08. This scheme
simplifies the handler software as only one address area is applicable for
the receive process.
Both buffers have a size of 13 byte to store the CAN control bits, the
identifier (standard or extended) and the data content (for details see
Programmer’s model of message storage
on page 371).
The Receiver Full flag (RXF) in the msCAN08 Receiver Flag Register
(CRFLG) (see
msCAN08 receiver flag register (CRFLG)
on page 382)
signals the status of the foreground receive buffer. When the buffer
contains a correctly received message with matching identifier this flag
is set.
After the msCAN08 successfully received a message into the
background buffer it copies the content of RxBG into RxFG
1
, sets the
RXF flag, and emits a receive interrupt to the CPU
2
. A new message -
which may follow immediately after the IFS field of the CAN frame - will
be received into RxBG.
The user’s receive handler has to read the received message from
RxFG and to reset the RXF flag in order to acknowledge the interrupt
and to release the foreground buffer.
1. Only if the RXF flag is not set.
2. The receive interrupt will occur only if not masked. A polling scheme can be applied on RXF
also.
6-can