Serial Peripheral Interface Module (SPI)
MC68HC08AZ32
236
Serial Peripheral Interface Module (SPI)
MOTOROLA
When an SPI is configured as a slave, the SS pin is always configured
as an input. It cannot be used as a general purpose I/O regardless of the
state of the MODFEN control bit. However, the MODFEN bit can still
prevent the state of the SS from creating a MODF error. See
SPI status
and control register (SPSCR)
on page 240.
NOTE:
A ‘1’ on the SS pin of a slave SPI puts the MISO pin in a high-impedance
state. The slave SPI ignores all incoming SPSCK clocks, even if
transmission has already begun.
When an SPI is configured as a master, the SS input can be used in
conjunction with the MODF flag to prevent multiple masters from driving
MOSI and SPSCK. See
Mode fault error
on page 224. For the state of
the SS pin to set the MODF flag, the MODFEN bit in the SPSCK register
must be set. If the MODFEN bit is low for an SPI master, the SS pin can
be used as a general purpose I/O under the control of the data direction
register of the shared I/O port. With MODFEN high, it is an input-only pin
to the SPI regardless of the state of the data direction register of the
shared I/O port.
The CPU can always read the state of the SS pin by configuring the
appropriate pin as an input and reading the data register. See
Table 4
.
1. X = don’t care
V
SS
(clock ground)
V
SS
is the ground return for the serial clock pin, SPSCK, and the ground
for the port output buffers. To reduce the ground return path loop and
minimize radio frequency (RF) emissions, the ground pin should be
connected of the slave to the V
SS
pin.
Table 4. SPI configuration
SPE
SPMSTR MODFEN SPI CONFIGURATION
STATE OF SS LOGIC
0
X
(1)
X
Not Enabled
General-purpose I/O; SS
ignored by SPI
1
0
X
Slave
Input-only to SPI
1
1
0
Master without MODF
General-purpose I/O; SS
ignored by SPI
1
1
1
Master with MODF
Input-only to SPI
28-spi