參數(shù)資料
型號: MC68HC05X4CDW
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 120/156頁
文件大小: 3699K
代理商: MC68HC05X4CDW
Parallel input/output ports
MC68HC05X4 Rev 1.0
Parallel input/output ports
Port registers
The following sections explain in detail the individual bits in the data and
control registers associated with the ports.
Port A data
register (PADR)
Each bit can be configured as input or output via the corresponding data
direction bit in the port A DDR.
Reset does not affect the state of this register.
NOTE:
If the AWPS bit in the PCR is set then this location becomes the port A
wired-OR interrupt enable register. Writing a ‘1’ to any bit enables WOI
on the corresponding port A line.
Port B data register
(PBDR)
Each bit can be configured as input or output via the corresponding data
direction bit in the port B DDR.
Reset does not affect the state of this register.
Port configuration
register (PCR)
WOIF — Wired-OR interrupt flag
1 = Indicates that a wired-OR interrupt has been received. A CPU
interrupt request is generated if WOIE is set on port A or port B.
0 = The flag is cleared by writing a ‘0’ to it.
TIMEN — Timer enable
CAF — Indicates when MCAN is asleep
Address:
$0005
Bit 7
654321
Bit 0
WOIF
TIMEN
CAF
BPDE0
BWE
AWPS
Reset:
-
000000
Figure 2. Port Configuration Register (PCR)
4-ports
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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