參數(shù)資料
型號: MC68HC05X4CDW
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.2 MHz, MICROCONTROLLER, PDSO28
封裝: PLASTIC, SOIC-28
文件頁數(shù): 118/156頁
文件大?。?/td> 3699K
代理商: MC68HC05X4CDW
Parallel input/output ports
MC68HC05X4 Rev 1.0
Parallel input/output ports
Input/output programming
Bi-directional port lines may be programmed as inputs or outputs under
software control. The direction of each pin is determined by the state of
the corresponding bit in the port data direction register (DDR). Each port
has an associated DDR. Any I/O port pin is configured as an output if its
corresponding DDR bit is set. A pin is configured as an input if its
corresponding DDR bit is cleared.
At power-on or reset, all DDRs are cleared, thus configuring all port pins
as inputs. The data direction registers can be written to or read by the
processor. During the programmed output state, a read of the data
register actually reads the value of the output data latch and not the I/O
pin. Refer to Figure 1 and Table 1.
Port A
Port A is an 8-bit bi-directional port. The port A data register is at $0000
and the data direction register (DDR) is at $0004. Reset does not affect
the data register, but clears the data direction register, thereby returning
the ports to inputs. Writing a ‘1’ to a DDR bit sets the corresponding port
pin to output mode.
Figure 1. Standard I/O port structure
Latched data
register bit
DDRn
DATA
Input
buffer
Output
buffer
O/P
data
buffer
M68HC05
inter
nal
connections
DDRn
DATA
I/O pin
100
111
0
tristate
0
1
tristate
I/O
Pin
Output
Input
Data direction
register bit
2-ports
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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