參數資料
型號: MC68HC05RC18FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數: 68/124頁
文件大?。?/td> 457K
代理商: MC68HC05RC18FN
NON-DISCLOSURE
AGREEMENT
REQUIRED
Resets
General Release Specification
MC68HC05RC18 Rev. 2.0
48
Resets
MOTOROLA
5.3 External Reset (RESET)
The RESET pin is one of the two external sources of a reset. This pin is
connected to a Schmitt trigger input gate to provide an upper and lower
threshold voltage separated by a minimum amount of hysteresis. This
external reset occurs whenever the RESET pin is pulled below the lower
threshold and remains in reset until the RESET pin rises above the
upper threshold. This active-low input will generate the RST signal and
reset the CPU and peripherals. Termination of the external RESET input
or the internal COP watchdog reset are the only reset sources that can
place the MCU in a nonuser operating mode. POR and LPRST place the
MCU in user mode while the illegal address reset has no effect on
operating mode.
Figure 5-1. Reset Block Diagram
NOTE:
Activation of the RST signal is generally referred to as reset of the
device, unless otherwise specified.
CPU
LATCH
RESET
COP WATCHDOG
(COPR)
RST
OSC
DATA
ADDRESS
PH2
TO OTHER
PERIPHERALS
S
IRQ
MODE
SELECT
TO IRQ
LOGIC
LATCH
R
POWER-ON RESET
(POR)
VDD
ILLEGAL ADDRESS
(ILLADDR)
ADDRESS
CLOCKED
D
LPRST
TO OSCILLATOR MODULE
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