參數(shù)資料
型號(hào): MC68HC05RC18FN
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝: PLASTIC, LCC-44
文件頁數(shù): 63/124頁
文件大小: 457K
代理商: MC68HC05RC18FN
Interrupts
Hardware Interrupts
MC68HC05RC18 Rev. 2.0
General Release Specification
MOTOROLA
Interrupts
43
NON-DISCLOSURE
AGREEMENT
REQUIRED
4.6 Hardware Interrupts
All hardware interrupts except RESET are maskable by the I bit in the
CCR. If the I bit is set, all hardware interrupts (internal and external) are
disabled. Clearing the I bit enables the hardware interrupts.
The three types of hardware interrupts, which are explained in the
following sections, are:
1. External interrupt
2. Core timer interrupt
3. Carrier modulator transmitter interrupt
4.6.1 External Interrupt (IRQ/Port B Keyscan)
The IRQ pin provides an asynchronous interrupt to the CPU. A block
diagram of the IRQ function is shown in Figure 4-2.
NOTE:
The BIH and BIL instructions will apply to the level on the IRQ pin itself
and to the output of the logic OR function with the port B IRQ interrupts.
The states of the individual port B pins can be checked by reading the
appropriate port B pins as inputs.
Figure 4-2. IRQ Function Block Diagram
IRQ
LATCH
R
IRQ PIN
LEVEL
(MASK OPTION)
TO IRQ
PROCESSING
IN CPU
PORT B
TO BIH & BIL
INSTRUCTION
SENSING
IRQ CLEAR
VDD
EIMSK
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