參數(shù)資料
型號(hào): MC68HC05P9AVDW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁(yè)數(shù): 9/90頁(yè)
文件大?。?/td> 285K
代理商: MC68HC05P9AVDW
GENERAL RELEASE SPECIFICATION
MC68HC05P9A
GENERAL DESCRIPTION
MOTOROLA
Rev. 2.0
1-7
1.6
Input/Output Programming
Port pins may be programmed as inputs or outputs under software control. The
direction of the pins is determined by the state of the corresponding bit in the port
data direction register (DDR). Each I/O port has an associated DDR. Any I/O
port pin is congured as an output if its corresponding DDR bit is set to a logic
one. A pin is congured as an input if its corresponding DDR bit is cleared to a
logic zero.
At power-on or reset, all DDRs are cleared, which congures all pins as inputs.
The data direction registers are capable of being written to or read by the
processor. During the programmed output state, a read of the data register
actually reads the value of the output data latch and not the I/O pin. For further
information, see Table 1-1 and Figure 1-4.
Figure 1-4. I/O Circuitry
Table 1-1. I/O Pin Functions
R/W
DDR
I/O Pin Function
0
The I/O pin is in input mode. Data is written into the output data latch.
0
1
Data is written into the output data latch and output to the I/O pin.
1
0
The state of the I/O pin is read.
1
The I/O pin is in an output mode. The output data latch is read.
R/W is an internal signal.
Data Direction
Register Bit
Latched Output
Data Bit
I/O
Pin
Input
Reg
Bit
Input
I/O
Output
Internal
HC05
Connections
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