
TABLE OF CONTENTS
Section
Title
Page
GENERAL RELEASE SPECIFICATION
MC68HC05P9A
MOTOROLA
Rev. 2.0
iii
SECTION 1
GENERAL DESCRIPTION
1.1
Features .......................................................................................................... 1-1
1.2
Mask Options .................................................................................................. 1-2
1.3
MCU Structure ................................................................................................ 1-3
1.4
Pin Assignments ............................................................................................. 1-4
1.5
Signal Description ........................................................................................... 1-4
1.5.1
VDD and VSS ............................................................................................... 1-4
1.5.2
IRQ ............................................................................................................. 1-4
1.5.3
OSC1 and OSC2 ........................................................................................ 1-5
1.5.4
RESET ........................................................................................................ 1-5
1.5.5
TCMP .......................................................................................................... 1-5
1.5.6
PA0 through PA7 ........................................................................................ 1-5
1.5.7
SDO/PB5, SDI/PB6, and SCK/PB7 ............................................................ 1-6
1.5.8
PC0 through PC7 ........................................................................................ 1-6
1.5.9
PD5 and TCAP/PD7 ................................................................................... 1-6
1.6
Input/Output Programming .............................................................................. 1-6
SECTION 2
MEMORY
2.1
ROM ................................................................................................................ 2-3
2.2
ROM Security Feature .................................................................................... 2-3
2.3
RAM ................................................................................................................ 2-3
SECTION 3
CENTRAL PROCESSING UNIT
3.1
Accumulator (A) .............................................................................................. 3-1
3.2
Index Register (X) ........................................................................................... 3-1
3.3
Condition Code Register (CCR) ...................................................................... 3-1
3.3.1
H — Half Carry ........................................................................................... 3-1
3.3.2
I — Interrupt ................................................................................................ 3-2
3.3.3
N — Negative ............................................................................................. 3-2
3.3.4
Z — Zero ..................................................................................................... 3-2
3.3.5
C — Carry/Borrow ...................................................................................... 3-2
3.4
Stack Pointer (SP) ........................................................................................... 3-2
3.5
Program Counter (PC) .................................................................................... 3-3